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DATE: 10-10-2014 HOTFIX VERSION: 037
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$ x" m5 h$ w @2 k+ v1314031 CONCEPT_HDL CORE GenView should automatically refresh the page where the block symbol has been instantiated( Y. o( f% l9 z3 N8 ` |
1318575 SIG_EXPLORER SIMULATION Display Parasitic on Wirebond (selecting the second one) crashes APD
1 x5 v( l0 u+ F1319258 ALLEGRO_EDITOR INTERFACES Enhance IPC-2581 so that the rotation of pad shapes is defined at the LandPattern definition and Pin elements levels
! x% Z- a! l; O1320054 ALLEGRO_EDITOR INTERFACES IPC2581 Import Stackup
3 B# n) Z4 e5 n9 E4 z3 N4 t1320467 CONCEPT_HDL CORE Incorrect directives in cds.cpm for nconcepthdl (cont.)% h* H" A4 n' l" E8 ^/ E
1320878 ALLEGRO_EDITOR EDIT_ETCH Allegro crash when using scribble) Y. H! p% u. S% L3 b i( O$ E
1321319 ALLEGRO_EDITOR INTERFACES Step Export has wrong size
7 Q8 Y! M2 R8 l$ A8 Z2 T1322394 CONCEPT_HDL OTHER Packager runs without errors even when the DEHDL schematic pages are corrupt.
8 t: z; A- G: e' L, W; D1323892 CONCEPT_HDL CORE The SI_MODEL_PATH should not write to $HOME/pcbenv/env, k) q$ p, J; ]
1324438 SIP_LAYOUT EXPORT_DATA SiP Layout - netlist spreadsheet, Error on exporting a spreadsheet on design file! [! L# k' b( }% ^! b
1324533 F2B PACKAGERXL Export Physical fails - pxl.exe has stopped working) A2 h$ j: J$ N, W, d& c
6 `2 d& W: K b) k( J暂时不提供文件下载 |
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发表于 2014-10-11 14:22
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