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cuilei83

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1#
发表于 2008-8-29 14:48 | 只看该作者 回帖奖励 |正序浏览 |阅读模式

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#1 Error [ALG0031] Pin number missing from Pin "1" of Package CAP NP , C2: SCHEMATIC1, PAGE1 (3.20, 2.20). All pins should be numbered. $ a  ]8 O+ }, C0 J: J6 p
#2 Error [ALG0031] Pin number missing from Pin "2" of Package CAP NP , C2: SCHEMATIC1, PAGE1 (3.20, 2.20). All pins should be numbered. ! i) `$ Q- }% d. r
#3 Error [ALG0031] Pin number missing from Pin "1" of Package SW PUSHBUTTON , S1: SCHEMATIC1, PAGE1 (1.90, 2.10). All pins should be numbered. + `9 T/ q1 Y+ C. K. R
#4 Error [ALG0031] Pin number missing from Pin "2" of Package SW PUSHBUTTON , S1: SCHEMATIC1, PAGE1 (1.90, 2.10). All pins should be numbered.
/ E3 r! P8 b  N/ m8 t4 P) Z6 e#5 Error [ALG0031] Pin number missing from Pin "1" of Package CAP NP , C3: SCHEMATIC1, PAGE1 (3.20, 2.60). All pins should be numbered. & {: ~7 R6 [* f2 p; _& @
#6 Error [ALG0031] Pin number missing from Pin "2" of Package CAP NP , C3: SCHEMATIC1, PAGE1 (3.20, 2.60). All pins should be numbered.
) b' C1 m5 i  w  d9 `#7 Error [ALG0031] Pin number missing from Pin "1" of Package R , R1: SCHEMATIC1, PAGE1 (2.50, 3.50). All pins should be numbered.
; l% l7 A% J9 _$ }' }& u, X#8 Error [ALG0031] Pin number missing fr om Pin "2" of Package R , R1: SCHEMATIC1, PAGE1 (2.50, 3.50). All pins should be numbered. # ~* j0 I- f! b3 h" g; j9 _
#9 Error [ALG0031] Pin number missing from Pin "1" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered. & x7 ^5 e3 [6 X" |
#10 Error [ALG0031] Pin number missing from Pin "2" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered.
  Z/ n* S; P" Q- X* P, f. d* }#11 Error [ALG0031] Pin number missing from Pin "3" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered.
% z" s: t% B- q+ c6 o: V- [6 V#12 Error [ALG0031] Pin number missing from Pin "4" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered.
7 S; I$ a6 M3 d. ^! R- L#13 Error [ALG0031] Pin number missing from Pin "1" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
0 b& a3 }4 h6 K' c#14 Error [ALG0031] Pin number missing from Pin "2" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. : q9 N/ P% W! w" g! Q' V8 R$ E7 J9 ~
#15 Error [ALG0031] Pin number missing from Pin "3" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
) i$ Z% r6 S. @5 r#16 Error [ALG0031] Pin number missing from Pin "4" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
: v1 I9 o/ X0 `" K#17 Error [ALG0031] Pin number missing from Pin "5" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. ! b& J6 Q% e: {, U+ s, c
#18 Error [ALG0031] Pin number missing from Pin "6" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
% P/ Z) g7 E- C) n#19 Error [ALG0031] Pin number missing from Pin "7" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
  S) ^$ O" G) @% P1 C$ y: i#20 Error [ALG0031] Pin number missing from Pin "8" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
0 c/ k6 B1 \4 A, h: E1 \1 y#21 Error [ALG0031] Pin number missing from Pin "1" of Package CRYSTAL , Y1: SCHEMATIC1, PAGE1 (3.70, 2.40). All pins should be numbered. " \0 x9 ^7 m0 H4 n6 T! z
#22 Error [ALG0031] Pin number missing from Pin "2" of Package CRYSTAL , Y1: SCHEMATIC1, PAGE1 (3. 70, 2.40). All pins should be numbered. * Z" q4 K! |9 t+ D5 U& K7 R0 m
#23 Error [ALG0031] Pin number missing from Pin "1" of Package CAP_0 , C1: SCHEMATIC1, PAGE1 (2.50, 2.10). All pins should be numbered. 0 ~" g* ?  K1 x/ [, W5 y
#24 Error [ALG0031] Pin number missing from Pin "2" of Package CAP_0 , C1: SCHEMATIC1, PAGE1 (2.50, 2.10). All pins should be numbered. % c( f" |: q& s0 w& E5 p
#25 Aborting Netlisting... Please correct the above errors and retry. , G4 a* ?& w) v
生成网络表示产生如上错误，该如何更正？？？
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cuilei83

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9#
 楼主| 发表于 2008-8-30 10:38 | 只看该作者

刚开始学啊 有很多不是很明白

不好意思啊 我用的封装是layout 中的  是不是allegro 中的封装不能用layout中的？？？谢谢诶

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8#
发表于 2008-8-30 00:24 | 只看该作者
'Package name is not legal.'.说得很清楚嘛，封装命名有问题，出现了非法字符。Allegro中的封装名不能出现“.”似乎“/”也是非法字符。唉，其他的就不说了。

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7#
发表于 2008-8-29 22:45 | 只看该作者
帖子不要发一大串，看的不爽，没心情帮你改错，同类型错误发一个就行了，把所有的错误都发出来，自己不分析一下就来问，那是对自己的不负责

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cuilei83

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6#
 楼主| 发表于 2008-8-29 17:25 | 只看该作者

文件如下 请高手再指点！！！

谢谢  orz

wenjian1.rar

17.91 KB, 下载次数: 10, 下载积分: 威望 -5

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5#
 楼主| 发表于 2008-8-29 17:20 | 只看该作者

回复 4# 的帖子

这个改过来了 可是又产生错误了如下
0 {3 A" @, J+ F* u********************************************************************************( a: y% _% k2 c0 r
*: \# M, B: d/ h* i
* Netlisting the design
  g6 A+ \$ P5 ^1 ]. w5 }8 P*) G9 U4 B& t( c) ~, Y
********************************************************************************/ S0 d8 p. _3 w; I
Design Name:
  G" ]1 j# p/ V% k% Z0 ]C:\wenjian1\yanli2.dsn
0 c1 p7 C. d3 e: ]2 \$ kNetlist Directory:
9 a0 s7 n. d: Z& l- G+ i/ _. zC:\wenjian1\allegro
* o3 l; L4 Z1 C! e. LConfiguration File:
" Q6 }+ p# m* _* S7 SC:\Cadence\SPB_15.2\tools\capture\allegro.cfg/ X) G1 R' e: b
3 o: S; o" N* t# o" Q& m' d& `( ~
Spawning... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"2 a3 e/ i' T& R
#1 Warning [ALG0016] Part Name "CAP_0_CPCYL1/D.300/LS.200/.034_10UF" is renamed to "CAP_0_CPCYL1/D.300/LS.200/.034_"./ N; V. t, }5 }% h* m4 N2 ]4 ?
#2 Warning [ALG0016] Part Name "CAP NP_0_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_0_RAD/.200X.100/LS.100/.".7 `+ v' Q3 w3 V0 U9 T  Z6 \0 y
#3 Warning [ALG0016] Part Name "CAP NP_1_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_1_RAD/.200X.100/LS.100/.".8 V# L" Y+ {4 _6 a) ?6 S% {
#4 Warning [ALG0016] Part Name "4 HEADER_0_SIP/TM/L.400/4_4 HEADER" is renamed to "4 HEADER_0_SIP/TM/L.400/4_4 HEA".* f! q9 `) B1 K0 S* B. `/ t
#5 Warning [ALG0016] Part Name "8 HEADER_0_SIP/TM/L.800/8_8 HEADER" is renamed to "8 HEADER_0_SIP/TM/L.800/8_8 HEA".
: E# r6 Q4 \# Z#6 Warning [ALG0016] Part Name "SW PUSHBUTTON_0_RAD/.400X.200/LS.300/.034_RESET" is renamed to "SW PUSHBUTTON_0_RAD/.400X.200/L".# T" P8 ^6 t" Q2 b0 O" O
#7 Warning [ALG0016] Part Name "8051_DIP.100/40/W.600/L2.050_8051" is renamed to "8051_DIP.100/40/W.600/L2.050_80".
9 f  }2 J. m3 F5 y7 d4 A5 [#8 Warning [ALG0016] Part Name "74LS373_DIP.100/20/W.300/L1.075_74LS373" is renamed to "74LS373_DIP.100/20/W.300/L1.075".
$ k' r4 K0 P4 W" W- j#9 Warning [ALG0016] Part Name "27512_DIP.100/28/W.6005 Y& ~& F+ t0 N8 d* z* L. j
/L1.400_27512" is renamed to "27512_DIP.100/28/W.600/L1.400_2".: F/ Z- D5 |# O! @+ B) J
#10 Warning [ALG0016] Part Name "CRYSTAL_0_RAD/.400X.150/LS.300/.034_12M" is renamed to "CRYSTAL_0_RAD/.400X.150/LS.300/".2 ]# _3 T5 ^1 b2 g% d
Scanning netlist files ...
# h: M! v& Q% U, `  rLoading... C:\wenjian1\allegro/pstchip.dat4 Z1 L/ Y7 J1 {& c4 B4 z" }
Loading... C:\wenjian1\allegro/pstchip.dat1 x' y/ `0 B7 e; x
Loading... C:\wenjian1\allegro/pstxprt.dat
( z( V' i2 b  Z+ M: ALoading... C:\wenjian1\allegro/pstxnet.dat/ J/ T3 _, U4 A
packaging the design view...2 |% Y# b* o( ?) G* G0 U
# y% p2 C4 C6 N; O' j
Exiting... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"+ @+ m. I( E. H1 O5 G
! ^* ~/ c) o& Y5 ^* w$ C: j

& g1 w6 }1 j" Y% h  i( G*** Done ***
: l% P- `4 l( K. z3 i/ \
' w* k' ^9 X+ l) Q- N8 W********************************************************************************4 i3 y4 @# g! V2 R% _8 Q2 l
*
4 u) g6 ~$ D5 z; J/ I9 \( ^* Updating Allegro Board
. F, U' G6 d! V( {6 ]: a*
2 A% s0 g' h& x, \, d8 Y6 n********************************************************************************
2 E( a, ^7 h7 S" l* V, P3 }Netlist Directory:
( q, L+ U2 J" H5 p, V; pC:\wenjian1\allegro
/ i% Z* l8 A, c% iInput Allegro Board:
$ d& h5 q1 Y% I- t: J8 a$ d8 a/ v5 t9 YC:\wenjian1\allegro\yanli2.brd  |5 R  }2 }7 h- d# N! f* d
Output Allegro Board:
9 Q1 e+ b, _0 v6 `4 dC:\wenjian1\allegro\yanli2.brd
9 x8 f7 W3 x/ l9 L9 R, B
: D7 A. s% Q0 bSpawning... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd"/ P1 J6 [) A: x0 r% v  M
Reading File : C:/wenjian1/allegro/pstchip.dat                W1 R4 [, _' o) q7 B/ o
(00:00:00.00)
$ `; `1 }7 j7 K( X0 _Reading File : C:/wenjian1/allegro/pstxprt.dat              
( M" l2 H) R2 _7 x(00:00:00.00)
6 g' |2 _+ g1 y% J' T% @Reading File : C:/wenjian1/allegro/pstxnet.dat              
' Y% w+ ~4 N: \- ^(00:00:00.00)
, X, t: B# {: ~  `8 YStarting to process component instances3 e5 n; D7 R1 i; x0 O  R

5 j7 s# Q5 I. W1 f: j( x# Znetrev run on Aug 29 17:10:17 2008
( ~( M. j/ b, U   DESIGN NAME : 'YANLI2'3 {" I' _. ]6 ^! O
   PACKAGING ON Apr  6 2004 19:58:38# q/ r2 M; V1 l4 B5 \9 y1 r
7 M. D- q, t2 r) p* w

  A3 u% A$ \" ^, R& n 12 errors detected" G; V% ?( R1 S" _% V
No oversight detected" d' Q) A6 d8 M- [( M2 s/ L# R
No warning detected
2 |, Y$ g5 r' p6 `
7 }' n) y$ |6 v, ]) {# gcpu time      0:00:125 Y8 C, p$ I7 o- q7 u) y
elapsed time  0:00:00
+ N3 x% V6 ~" d0 n" O4 L) ]! @3 }9 ~9 e! v$ ^
( K$ v. @2 n/ x+ {
Exiting... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd"
" Q1 L( B# \; Q, ~5 C4 T8 Z9 WCadence Design Systems, Inc. netrev 15.2 Fri Aug 29 17:10:17 2008
/ p- K8 g3 E% o" m9 {4 h(C) Copyright 2002 Cadence Design Systems, Inc.
' p- f: v9 z! a, U) _3 K) F2 Y
; i$ H7 B9 x) T: q3 t1 L. [------ Directives ------5 m9 _8 T! d9 H% k9 P2 Z
* z6 v) V: t$ A  C2 l
RIPUP_ETCH FALSE;
: P7 y) V2 T( \RIPUP_SYMBOLS ALWAYS;# f+ d6 T1 i6 {: K
MISSING SYMBOL AS ERROR FALSE;/ k/ ]- ?- ?2 k  U. D
SCHEMATIC_DIRECTORY 'C:\wenjian1\allegro';
: n4 P; y2 z/ t1 n  d4 w7 b5 dBOARD_DIRECTORY '';
5 P. |5 }$ i. F5 }9 ^OLD_BOARD_NAME 'yanli2.brd';7 S: h" |( a$ |- h- ~* g5 M  a
NEW_BOARD_NAME 'yanli2.brd';
. T8 I* d/ g9 s- m  ?1 U. h/ w, ~% L5 P  d# m+ b! p. e% w
CmdLine: netrev.exe -5 -y 1 -n -i C:\wenjian1\allegro C:\wenjian1\allegro\yanli2.brd C:\wenjian1\allegro\yanli2.brd2 P, j$ |5 N* m- y$ p5 V/ U

4 p  _8 b& s5 V( s3 J; R+ _: Z: M4 j! f& [------ Preparing to read pst files ------
+ k9 o" e0 a9 d! g: B
- t9 W, v$ P- V& NStarting to read C:/wenjian1/allegro/pstchip.dat $ d  N1 e6 N- E8 w
   Finished reading C:/wenjian1/allegro/pstchip.dat (00:00:00.00)4 y6 i& e% [1 x+ B
Starting to read C:/wenjian1/allegro/pstxprt.dat
7 N/ z9 N6 Q) h2 ^9 d* C   Finished reading C:/wenjian1/allegro/pstxprt.dat (00:00:00.00)9 p. p6 \3 l) A9 o( {) R
Starting to read C:/wenjian1/allegro/pstxnet.dat
% H, |2 j3 H: T, b7 r1 J$ I   Finished reading C:/wenjian1/allegro/pstxnet.dat (00:00:00.00)) t0 M% d/ @4 D2 I, o7 |
2 Y' e. F( K) N6 u6 e* s9 j
------ Oversights/Warnings/Errors ------
1 e; b$ b  C, U1 r& d$ A& }2 ^; H$ A. G7 g$ P$ `- A: E

* a  _) X( B: x7 ]0 G9 g* K#1   ERROR(302) Device library error detected.
6 c6 r' T2 j$ }- q2 e8 e* u0 I. L- u0 v. h- b' D
Problems with device 'CRYSTAL_0_RAD/.400X.150/LS.300/'. JEDEC_TYPE property 'RAD/.400X.150/LS.300/.034' is illegal: 'Package name is not legal.'.
$ }# H- c& z5 O0 k
7 S. |2 p6 Q' jDevice 'CRYSTAL_0_RAD/.400X.150/LS.300/' has library errors. Unable to transfer to Allegro.) L, J7 z; t3 G& M6 f5 d
" x# E8 @6 d- E# w7 J4 T
#2   ERROR(302) Device library error detected.( j2 h; @. V. k/ T' f* q

% X$ w1 c1 A8 V& o4 l% YProblems with device '27512_DIP.100/28/W.600/L1.400_2'. JEDEC_TYPE property 'DIP.100/28/W.600/L1.400' is illegal: 'Package name is not legal.'.
, s  W- b; }( ~$ Z! M
/ }, J+ F; Q, |0 r4 k  s% D/ S5 GDevice '27512_DIP.100/28/W.600/L1.400_2' has library errors. Unable to transfer to Allegro.6 o' T0 N3 O7 W4 m

+ q" q# Q. B9 O! m0 c) }/ ^( @; g) C#3   ERROR(302) Device library error detected.1 }. L+ G. }" [' }% [8 r: B; r# Q
- X7 g) c# X7 E7 W
Problems with device '74LS373_DIP.100/20/W.300/L1.075'. JEDEC_TYPE property 'DIP.100/20/W.300/L1.075' is illegal: 'Package name is not legal.'.& r# t* g4 S4 W% ?* O+ N

/ A' M# b% d/ z7 G4 LDevice '74LS373_DIP.100/20/W.300/L1.075' has library errors. Unable to transfer to Allegro.; y5 r! ~+ ~. [4 R' D" E
* ~3 |4 ^( i. v- @2 E
#4   ERROR(302) Device library error detected.% I/ c' ]( [; w% y

2 i4 ?  U$ Q2 e* h0 }2 JProblems with device '8051_DIP.100/40/W.600/L2.050_80'. JEDEC_TYPE property 'DIP.100/40/W.600/L2.050' is illegal: 'Package name is not legal.'.9 ~6 W0 C8 W/ d9 X% F3 S6 ~
% V; i$ p$ ?, o/ R# _
Device '8051_DIP.100/40/W.600/L2.050_80' has library errors. Unable to transfer to Allegro.( x2 o2 f1 K6 p* V4 I

9 M6 G3 A! Q5 g7 l! @#5   ERROR(302) Device library error detected.  x/ \8 ?& k6 ~- |7 L* t# k- S5 p

2 \  p2 o1 A: S5 oProblems with device 'SW PUSHBUTTON_0_RAD/.400X.200/L'. JEDEC_TYPE property 'RAD/.400x.200/LS.300/.034' is illegal: 'Package name is not legal.'.+ G+ |- O$ T: {# @

8 e$ l5 n0 U9 F+ k& R- uDevice 'SW PUSHBUTTON_0_RAD/.400X.200/L' has library errors. Unable to transfer to Allegro.  [0 c/ t9 `( \  f6 |( i

9 m) F. t/ n$ J' D#6   ERROR(302) Device library error detected./ t: D! I" H$ @* G" s
9 t& D4 P4 w, C; R( \4 X  `  a
Problems with device 'R_0_AX/.400X.100/.034_10K'. JEDEC_TYPE property 'AX/.400X.100/.034' is illegal: 'Package name is not legal.'.. k3 G& t  o6 I

0 l9 c8 x# }! [Device 'R_0_AX/.400X.100/.034_10K' has library errors. Unable to transfer to Allegro.
. Z' U0 l4 P* Z5 w6 S# i9 l' F0 s# u* w& b( b
#7   ERROR(302) Device library error detected.
# ~( t% \* Z$ A0 o% R, I, U0 e7 V7 r
Problems with device '8 HEADER_0_SIP/TM/L.800/8_8 HEA'. JEDEC_TYPE property 'SIP/TM/L.800/8' is illegal: 'Package name is not legal.'.7 H) F8 N8 E, _; b2 u6 ^$ H

2 w. ]+ C' O& c' K) x. YDevice '8 HEADER_0_SIP/TM/L.800/8_8 HEA' has library errors. Unable to transfer to Allegro.  p' V$ J1 G. p5 {! F

5 O  @1 J& N- U* Z#8   ERROR(302) Device library error detected.
7 Z( e4 x8 V# T0 W4 |* R+ ~' n; R3 @1 k' N
Problems with device '4 HEADER_0_SIP/TM/L.400/4_4 HEA'. JEDEC_TYPE property 'SIP/TM/L.400/4' is illegal: 'Package name is not legal.'.
8 l' T) L- z4 O# H
/ j+ {2 G* ~: z3 k* \2 S* yDevice '4 HEADER_0_SIP/TM/L.400/4_4 HEA' has library errors. Unable to transfer to Allegro./ x4 f1 W8 j' t  |4 `: f
. e  D( S' g5 o9 t5 I% g
#9   ERROR(302) Device library error detected.
7 b5 \4 [5 o1 S! q8 J* z
3 P) u* D: Z8 V* iProblems with device 'CAP NP_1_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'.
; Z5 d( \4 I( P: Q+ e2 h; u- i$ @* o) Z6 G" j. y4 ~
Device 'CAP NP_1_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro.6 Q) t) M7 [' R

5 N! C2 r5 R. ]7 k' X. f8 v#10  ERROR(302) Device library error detected.
7 t( z9 V& T/ C! i
' ]% e3 `- s& O! GProblems with device 'CAP NP_0_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'.& q1 ?9 r2 m) I" x/ x- G' G4 l7 E
5 r( W# |) W: Y
Device 'CAP NP_0_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro.
7 {! t! _% l! M
) E6 r% Z$ @, ]/ c#11  ERROR(302) Device library error detected.
3 J6 R8 [+ b3 `+ J6 E3 h2 Y1 K- i% w* C- N9 p7 Y9 q" `
Problems with device 'CAP_0_CPCYL1/D.300/LS.200/.034_'. JEDEC_TYPE property 'CPCYL1/D.300/LS.200/.034' is illegal: 'Package name is not legal.'.7 a5 ~  ~+ F, d- P0 t; i

/ Z" Q+ w$ c) @! P% fDevice 'CAP_0_CPCYL1/D.300/LS.200/.034_' has library errors. Unable to transfer to Allegro.. T1 D! i8 r' i7 z
/ D" F: _3 S7 D& U- v, i1 Z8 A
------ Summary Statistics ------4 ]4 V. a# e0 ^' |7 ^
/ t7 J/ G! a/ M" ?" w
$ @7 c# M$ `5 Q. B  p/ J2 `% {
#12  ERROR(102) Run stopped because errors were detectedへ6 K5 Q* h) y& a5 c

. \6 ?! a) E) n) R8 r* [% u, X. N: s% L  v$ u. w( Q
netrev run on Aug 29 17:10:17 2008' i9 ^3 \6 A/ U* V. }" k) Q
   DESIGN NAME : 'YANLI2'
; j5 y( |6 {) w0 T% m. C   PACKAGING ON Apr  6 2004 19:58:381 e! D) i' {/ x6 K, V

3 W. N! |  J& r, p1 M, n4 O" k   COMPILE 'logic'
$ C4 d, `1 {# n7 c0 |   CHECK_PIN_NAMES OFF
+ A$ ^: C9 z7 a   CROSS_REFERENCE OFF/ u$ @( P2 Q2 a* _* X1 n/ h
   FEEDBACK OFF3 X9 K2 {- Q9 U3 F3 r
   INCREMENTAL OFF' ^1 R0 I7 q* a$ q: P
   INTERFACE_TYPE PHYSICAL: o1 @5 F- h$ t& {) D( @% \7 H
   MAX_ERRORS 5005 G6 I3 r4 I- {4 A3 x+ Z
   MERGE_MINIMUM 5
* G. a6 v" R, _& U2 r" j+ D9 e, y   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
) ~4 u9 B+ ]# [5 N( H   NET_NAME_LENGTH 241 a2 \0 l* h' o
   OVERSIGHTS ON$ c8 y3 _' Q6 f# {
   REPLACE_CHECK OFF
, v- ?3 N- S- e* r: ]+ \   SINGLE_NODE_NETS ON+ F5 S' v  R8 ~. e+ [+ U( `' z
   SPLIT_MINIMUM 0
' z( L/ D* d- r/ t& [   SUPPRESS   20
* N! |% b% e% a9 x0 ~   WARNINGS ON7 Z- R1 w/ f$ t: Y0 P: J
8 y  [9 X$ H+ p5 Z3 a% B" E
12 errors detected
0 ?$ v* Z' ^! f7 u/ P/ d No oversight detected
0 L( C! O% Q0 J. f7 E  [ No warning detected
& G0 e1 ?. W6 G3 g/ l0 D* d
9 }% |: g( v" L0 k% x" p' n8 ~# Ncpu time      0:00:12
5 p+ h) y) f& z& ]! S- q8 E/ gelapsed time  0:00:00* N; J0 Y. M) O2 R* A
' S- C; P0 Y0 g" e

8 v& ?7 f: k" Q, J; }) c3 j
9 L  U8 Q5 p( q! Q4 v6 g7 C*** Done ***3 t# G/ }! ]3 l
8 @* n6 l- T2 J2 p' d% j7 g6 ]
********************************************************************************/ k+ F' t' d3 w; ^6 g" A* n6 F
*$ T2 d' j4 e* H
* Spawing Allegro
4 u7 v- y2 |/ h+ m- _*
& |) O4 M/ t5 v4 ^( {( R8 h********************************************************************************
8 H1 t' `+ v+ N9 l: l+ m6 hSpawing "C:\Cadence\SPB_15.2\tools\pcb\bin\allegro.exe" -mpssession Administrator "C:\wenjian1\allegro\yanli2.brd" 2 D! x0 @4 I) p$ X; C' D

- W7 H) v3 T0 ]5 q2 N  e$ u# E5 y4 l! F" T
*** Done ***/ L0 r% ~8 f* q4 S: l; d. S7 v
怎么回事

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lxwuming

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4#
发表于 2008-8-29 16:57 | 只看该作者
Number的框框没有任何数字,这是Allgro不允许的,通常会发生这样的问题会在原本的线路图是9.X的版本,然后我们用10.X或更高的版本开启的时候所产生的

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1.JPG

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cuilei83

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 楼主| 发表于 2008-8-29 14:59 | 只看该作者

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怎么修改啊 能不能详细介绍一下？

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lihuizju

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2#
发表于 2008-8-29 14:54 | 只看该作者
引脚没有命名。

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