Hotfix_$PB16.50.013

yulizi

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http://kuai.xunlei.com/d/DGOHIFKLICUP


DATE: 12-16-2011   HOTFIX VERSION: 013
+ P0 d, ^( T" Y# w8 A===================================================================================================================================
5 H* t' I8 {. K4 l* W3 tCCRID   PRODUCT        PRODUCTLEVEL2   TITLE
- E1 M+ k  m" j9 j) P1 N===================================================================================================================================
% E/ u2 U/ r5 S5 |5 R( ]: r875695  SIG_EXPLORER   INTERACTIV       Enforce Causality check box doesn't work.
927148  CAPTURE        PROJECT_MANAGER  Capture crashes on creating scehmatic folder with name which already exists in design
, N/ u7 `5 b  ?4 a938013  CAPTURE        NETLIST_OTHER    The netlist in RINF Format contained two identical lines for PCB FOOTPRINT
. C6 e+ v9 o) I) z6 A: d941409  PSPICE         PROBE            BUG : Search accuracy wrong in new cursor window
/ w5 m( Z; Y% R# G. x4 i945242  SIG_INTEGRITY  SIMULATION       Unable to select "shapes" in find filter for 'show parasitic ' command
; j" ~; E. v/ V/ J/ Z946293  CONCEPT_HDL    ARCHIVER         Archiver hangs if there is a whitespace at the end of the path of cref.dat
946770  CONCEPT_HDL    CORE             揤iew Design?function is missing in Windows Mode after reseting the menus.
950994  CAPTURE        NETGROUPS        Problem in expanding the netgroup in Auto Connect to Bus function
6 g0 L8 N7 I- s2 }! b953530  SIG_INTEGRITY  GEOMETRY_EXTRACT Display Parasitics is displaying wrong results for EMS2D Field Solver compared to topology extraction using Probe.
) k2 p& v6 l! q$ y# F2 M9 W953713  CONCEPT_HDL    PAGE_MGMT        Random page replacement/duplication in block
953917  CONCEPT_HDL    ARCHIVER         archcore should handle errors correctly
953971  ALLEGRO_EDITOR MANUFACT         NC Drill files not generated correctly when using the option "搒eparate files for plated/nonplatedholes?
954400  CAPTURE        NETGROUPS        BUS members of NetGroup are getting converted to Scalars in Export-Import NetGroup.
- r6 q- L9 d; Z* E1 L# T954498  SCM            B2F              SCM crashes when importing physical
) r4 t" x' b- ^2 `6 Q954623  ALLEGRO_EDITOR EDIT_ETCH        Unable to complete connection with Add Connect - related to soldermask to cline check?
: W! ]0 t  h0 k9 P7 M% a954894  ALLEGRO_EDITOR MANUFACT         Dimensions disappear when opening database in v16.5 from v16.3
955029  CONCEPT_HDL    CORE             custom text font size not recognized in symbol view
955133  SIG_INTEGRITY  FIELD_SOLVERS    The Field solver creates the differential trace model which is reversed T(D1) and T(D2) of bottom side.
$ T" K* w( O' m" {955290  CAPTURE        DRC              Description for UPD0014 missing in the Browse DRC markers window
7 [% }+ `  i- M$ D! ~7 Q955299  ALLEGRO_EDITOR DRC_CONSTR       drc text to smd pin does not work any more on this database in 16.3 S039
: ?" b$ O/ x4 G& U5 \4 x) l0 F955338  CONCEPT_HDL    CHECKPLUS        Need to change PART_NAME
% r* {, v- P+ O# b  A. f$ x4 {955447  SIG_EXPLORER   OTHER            Model path set in DE HDL Model Assignment not used by SigXP from CM in DE HDL
955740  SIG_INTEGRITY  GEOMETRY_EXTRACT Crosstalk with Timing Windows does not work correctly
: {1 ]4 v) A) D# c% b* I955749  ALLEGRO_EDITOR MANUFACT         show element Info shows symbol dimensions on incorrect subclass
, b7 D9 n/ Q4 z0 K955912  ALLEGRO_EDITOR OTHER            Shapes with voids that are exported to PDF have gray filled area over the void
956129  CONCEPT_HDL    INFRA            DEHDL uprev hierachical design from 16.2 to 16.5 packaging failure.
3 _6 H5 @; f. G# @# R9 z! o4 C6 t956373  ALLEGRO_EDITOR NC               drawing name doesn't display in the log file
956393  CAPTURE        PROJECT_MANAGER  "GENERAL" and "TYPE" tabs are missing from "Properties" dialogue box.
  X% w7 M! u0 Y4 }956448  PSPICE         MODELEDITOR      Can not generate a DEHDL symbol from Model Editor, because no Capture license found
956456  CAPTURE        NETLIST_OTHER    OrTelesis netlist not transferring user properties defined under combined
956489  ALLEGRO_EDITOR MANUFACT         dimensions lost when symbol with diemnsions attached to symbol origin placed on board
. ~+ U- I6 S2 v8 ?2 ^956603  CONCEPT_HDL    OTHER            Part Manager "has stopped working" after changing a component
7 m5 o# a- W9 w* m( z956751  ALLEGRO_EDITOR ARTWORK          Import Gerber command does not work correctly
! n- v: r* e  G4 Z% D1 z3 M! f956847  PCB_LIBRARIAN  METADATA         PDV - Partdeveloper symbol to function linkage broken/changed in 16.5
956987  CAPTURE        OTHER            Find from "Search toolbar" doesn't gives complete results
1 V6 ?5 k! _7 o9 ^$ t" V956996  CONCEPT_HDL    INFRA            Correction to ERROR(SPCODD-7): Following Primitive instance causes CM to empty
957009  CAPTURE        NETLIST_OTHER    Problem getting database property in Mentor PADS PCB netlist
* r( ^) U4 o: E* m& V957137  APD            DXF_IF           DXF out  command dose not work correctly.
+ u+ g+ W" v) L* ^1 `6 x, I: h957167  APD            GRAPHICS         Highlighting for Static shape with display_nohilitefont environment variable.
3 ]4 |8 L. F4 w" g. D0 ?' f957232  SIG_INTEGRITY  OTHER            Allegro crash during Model Assignment.
957267  CONCEPT_HDL    INFRA            Packager Error after Import Design
# r: ]  p3 y8 h% @( M% j2 }957866  SIP_LAYOUT     DATABASE         Cavity outline is not getting deleted from symbol file
) h7 I' d) J# `7 G9 h- T1 g958010  ALLEGRO_EDITOR REPORTS          Wants the ability to extract "Batch"  reports from Partition ".dpf" files.
958252  ALLEGRO_EDITOR TESTPREP         Resequence testprep with the option - Delete probes too close crashes the design
3 r) ]! V( L* p, {* t958253  ALLEGRO_EDITOR REPORTS          Shape did not have thermal relief connected to pin but unrouted nets still shows zero.
958433  ALLEGRO_EDITOR DRC_CONSTR       False embedded component DRCs
958753  ALLEGRO_EDITOR SHAPE            Dynamic shape is getting corrupted in 16.5
959011  ALLEGRO_EDITOR OTHER            copy problem of via and cline
! F% j8 P$ C+ N- M" B! M959101  ALLEGRO_EDITOR EXTRACT          Using extracta with excluding Thermal reliefs
( s- }3 s2 U0 Y3 _" Y6 D2 X1 i959253  CONCEPT_HDL    INFRA            Design will not open
959299  APD            MODULES          Getting ERROR(SPMHDB-279) when trying to update modules placed on the Top side
4 k/ A& }, M1 d3 r3 I959884  CONCEPT_HDL    INFRA            Design Uprev/concept2cm crashes with Application Error/Out of Memory Error.
. b" u( o) z6 v. P5 ~7 N& T959909  ALLEGRO_EDITOR SCHEM_FTB        Site level propflow.txt file is ignored property is transferred
960067  SIP_LAYOUT     PLATING_BAR      Creation of plating bar removes "NODRC_ETCH_OUTSIDE_KEEPIN" property from the clines.
960126  SIG_EXPLORER   EXTRACTTOP       Allegro PCB SI license is used automatically at Topology Extraction of Allegro Physical Viewer.
. B& w0 W; X$ l( q) t# p  o  _/ r960143  SIG_INTEGRITY  GEOMETRY_EXTRACT Running simulation in Bus sim happened crash while enable Coulpled Via model to S parameter
: B' a) g+ p9 a8 j# y961349  CONCEPT_HDL    HDLDIRECT        Motorola designs have broken connectivity compared to 16.3
961816  ALLEGRO_EDITOR INTERFACES       Normal Export > DXF fails and offsets  the pins of the BGA symbol
1 r) J* S( D+ ?8 d. [1 \962519  SIP_LAYOUT     WIREBOND         Align option doesn't work for wb_tackpoint fingers

nbhand

s013，感谢楼主分享。

pmp_mcu

多谢分享。。。。。。。。。。。。。。。

bazhonglei

顶！！！！！谢谢分享！

fangqwas

谢谢分享

ZXCLH

15没装成功过,但还是谢谢你...

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cotterie

非常感谢楼主yulizi 的无私奉献，有了你这个论坛充满了生机和希望。

koncc

感謝分享{:soso_e100:}

reval

都更新些什么呢？？

luluman

大神啊，顶

john22ppo

! J- W; U; L( V& d4 e! k3 L感謝分享

interrupt

说什么好呢

suiwinder

楼主好人啊.
太感谢了.
5 ?8 O' G) S$ {! {现在这cadence也太差了把

adolfchen

感謝分享{:soso_e179:}

mengshang

太感谢您了