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Translating E:\WORK\TEST\1.asc.
4 K) \; e+ k5 ?: NReading PADS ASCII file header.& Q0 g( F' {8 } R" L& p' P
Version = PowerPCB5.01 s0 S9 u; I9 }+ _0 T) i9 x5 U# F% s! N
Route Layers = 4
4 M$ O" F# R7 d' W- J; u5 u3 ^; A% u Units = METRIC
8 \, R/ {% ?1 F, q Hatch mode = Vertical / Horizontal
/ `! ]/ J) {* C v2 z Hatch grid = 2.000000, angle = 0.000000, anti-pad spacing = 0.000315
% J+ v4 `. k( z# ]$ \Initializing new database.9 a# ]- c( O7 m
Creating layers.3 P# z9 m4 R: @7 C
Reading PADS ASCII file body.; a/ Z) B. N) o2 u1 A7 a1 D: |! D
*PARTTYPE*+ b9 P7 @/ d2 [/ [( d; \+ Q
*MISC*
. ` d7 P0 k( _5 z ^) ] *MISC*
& o/ u( T/ [' K) q# C. W; [ *MISC*
3 j( J$ ^! a) ?/ `! j! P# t *MISC*
3 [1 ?+ e( j* G) I& |0 ~/ L *MISC*
' i0 i& V8 O* O* ?" O1 P *REUSE*
# b5 p, ~. U: H1 m2 f& \, J. s- P *TEXT*( }' R1 D' D2 M- V9 [7 r5 A
*LINES*
+ }4 I; o$ z5 B4 @) a1 _. k *VIA*, z Y1 e$ a8 Z5 K$ J
*PARTDECAL*' c0 X' P/ G0 d" F
*PARTTYPE*
1 c1 a5 L# b, D5 o5 k( T *PART*
5 Z S/ I; ~' r# g *ROUTE*
# u; W/ S" R0 A Writing routes.
+ f( b& F1 `$ H0 l% `# c- c9 o *END*
' S# r9 d+ O) I, V1 D% W) k& W% O0 e5 h9 t7 a
===============================================================================
6 t0 J: h, C; o) l- a. }1 L PADS layer usage summary:
) {. H3 c p! r/ e! W; t" Y F Layers 1 to 4 are route layers.
" P" V" M1 I$ ?- W2 h: _+ N LINES:' u8 l3 }/ I% L# C* [
0 BOARD GEOMETRY - ALL& q* G) i$ @, [
1 ETCH - TOP
+ k' D, }2 e+ T; K" K, t 3 ETCH - INTERNAL2' q. j! `4 x. @, U$ @5 n- r
4 ETCH - BOTTOM& g4 Y& U9 O% D% r9 \% x" h
9 * Not mapped!
7 X$ |, w) S3 F 10 * Not mapped!# t# m% n' v3 Q, t }* j
COPPER:8 p& Q- |* t0 W. ]
TEXT:
" ]: f' a3 _( X: k 1 ETCH - TOP
0 ] [$ X% g* D' k 26 * Not mapped!( [& T! _# n# x: R$ k9 |2 v$ y1 O
DECALS:
$ m5 d2 I; T; t! P, P' g$ R 0 PACKAGE GEOMETRY - SILKSCREEN_TOP k( W( u# b% K9 g" |9 X7 {
1 PACKAGE GEOMETRY - SILKSCREEN_TOP
. j( n% f4 k8 w+ r+ ] 12 * Not mapped!
5 z, c j; M( p, v4 s5 i8 T 19 * Not mapped!7 m; g; D- h+ V8 O
26 * Not mapped!
: K/ \( l0 E, [2 l PADS:4 U" G$ [6 ]/ ]% _0 z9 g3 Z
0 ETCH - internal_pad_def
; _2 H W. a* ~6 M3 P0 ~) _ 1 ETCH - TOP
1 X6 c" X T) Y% J; l; |& | 2 ETCH - INTERNAL1
7 B# u% b* [! P/ Z( B 3 ETCH - INTERNAL2# k5 M7 L/ Z& {( G
4 ETCH - BOTTOM
( i7 k+ E% ^8 B. T& r% p; y 6 * Not mapped!
- P0 Q* \# {7 ?2 @ 15 * Not mapped!+ M7 r+ U* L9 L
16 * Not mapped!1 L% \5 E8 W+ } {1 N& D
23 * Not mapped!
3 t8 Q! z2 P( x( _6 k VIAS:3 P0 P8 s% \% { H, C0 h7 G
0 VIA CLASS - internal_pad_def) @; g" M( f) Q5 G( E
1 VIA CLASS - TOP
2 s2 o6 n, H& k- X) i# J6 a+ ^ 2 VIA CLASS - INTERNAL1
; ]* u$ ~* B) C 3 VIA CLASS - INTERNAL27 A* C8 `9 L/ I1 ?% C/ P) G
4 VIA CLASS - BOTTOM
( b4 ~- z" \# Z; F
8 s* W2 ?. S0 e$ q WARNING: 63 data objects mapped to the UNUSED class were ignored.
1 W) g. r' n) f4 G===============================================================================& n$ z+ B; R' k+ U% D
/ w1 Q5 b% ^% A( j( @1 rCreating E:\WORK\TEST\1.brd.! r3 B2 J9 t' `: c) a/ A9 Q
Loading netlist:% W8 C3 F. ?/ X. W: T8 |- t1 H
E:\WORK\TEST\1.TXT
, a) t2 p7 ^: ^# Q$ XWriting database.& h7 g& l# _8 ?- [4 `% y
ERROR: Error while writing the Allegro database.
2 a/ j- D( m3 L+ z! P e9 p# ]Closing database.
$ J. x2 i" b+ x& _2 @! V% U9 i* DTranslation complete.
* d5 k4 V( u- L1 W) o! g' OFinished with errors!5 u" f: B! @0 t& W
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发表于 2011-10-12 00:37
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楼主
发表于 2011-10-13 13:23