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DDR Freq: 396 MHz - a! _+ H0 f b7 }( w( `
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ddr_mr1=0x000000000 l$ m6 \6 n4 m0 \6 N: s& [ p
Start write leveling calibration...
5 B2 R" s! Q- A* o0 krunning Write level HW calibration( }2 r' e& V$ P# z9 m& v
Write leveling calibration completed, update the following registers in your initialization script
. @+ Y! |2 c1 ? MMDC_MPWLDECTRL0 ch0 (0x021b080c) = 0x00030007
( @( r6 Z5 k, W5 R MMDC_MPWLDECTRL1 ch0 (0x021b0810) = 0x00080008
1 J- G& x" A b% Z9 [Write DQS delay result:
1 S+ A4 v* Y. X3 |5 O7 ` Write DQS0 delay: 7/256 CK, C4 z6 k6 P+ V2 s, a2 L1 t* q0 [" [
Write DQS1 delay: 3/256 CK
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: G; Y8 b5 }$ {0 U2 Q9 k9 ]2 hStarting DQS gating calibration0 ]5 U8 ^6 X" X$ \6 H- |
. HC_DEL=0x00000000 result[00]=0x00000011' M) U4 W1 H% l& ~7 _' k
. HC_DEL=0x00000001 result[01]=0x000000111 D+ m9 E) M6 y1 F( ]
. HC_DEL=0x00000002 result[02]=0x00000011& S9 l/ i( W2 }( k& M" w# l# `' ]$ B$ [
. HC_DEL=0x00000003 result[03]=0x00000011
" u! x7 ]7 W, \" m2 N2 `2 c. HC_DEL=0x00000004 result[04]=0x00000011
8 ^, F% t& D& l% T4 V( z: q. HC_DEL=0x00000005 result[05]=0x00000011
4 T: H1 _3 ^# f+ @2 V' b* G. HC_DEL=0x00000006 result[06]=0x00000011
( G! g9 k8 Y9 F& C: L* z+ c. HC_DEL=0x00000007 result[07]=0x00000011/ Z- P3 A" h* }7 r$ W7 U9 S
. HC_DEL=0x00000008 result[08]=0x00000011& R) e+ H7 H& P( r, G8 b
. HC_DEL=0x00000009 result[09]=0x000000116 R5 G% E2 O& R
. HC_DEL=0x0000000A result[0A]=0x00000011
% d; k- a9 s5 J, B% c! x& W. HC_DEL=0x0000000B result[0B]=0x00000011, }9 t! J/ U: M O( N! q2 G- j, _
. HC_DEL=0x0000000C result[0C]=0x00000011- ]2 C3 b3 P/ G, o0 K
. HC_DEL=0x0000000D result[0D]=0x00000011+ V3 N: T9 `- v8 J/ g$ ?& l0 d
ERROR FOUND, we can't get suitable value !!!!* R7 k+ W- I! h2 Q
dram test fails for all values.
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Error: failed during ddr calibration1 Q! N: T" X* @+ m1 s* M% ~
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