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Fixed CCRs: SPB 17.2 HF022# v5 _5 s# I2 P9 n5 {- E
06-16-2017
7 c9 d7 [$ V4 i1 ]========================================================================================================================================================
4 _1 S7 d% p C5 N0 L; D+ |CCRID Product ProductLevel2 Title% c6 A. W3 ^7 u# O
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# d# [! N' `0 W1755789 ADW DBEDITOR Checking in HSS Block returns 'Failed to create archive'
2 Y k- W( g. o1731459 ADW FLOW_MGR Cannot open LRM from Flow Manager
6 [. F- ~2 d u; `: M0 p0 B1731460 ADW FLOW_MGR Cannot open LRM from Flow Manager
/ R. W8 N+ ]2 d: w1744081 ADW FLOW_MGR Error regarding configuration file when trying to open Workflow Manager
. n! p4 ?8 A y0 n1756727 ADW LIBIMPORT EDM Library Import fails with java exceptions when merging classifications; P/ z$ E) P1 r2 ^2 | E
1743763 ADW SRM Find filter is grayed out when Allegro PCB Editor is opened from EDM Flow Manager" y, p5 `1 ~3 w- Z
1748399 ALLEGRO_EDITOR DATABASE In release 17.2-2016, end caps not visible for certain clines in PCB Editor7 ?3 N2 q0 A( v, B8 R5 x) ~
1748522 ALLEGRO_EDITOR INTERACTIV A component mirrored using the 'funckey' command jumps to (0,0) position when the 'move' command is used on it( e5 N4 ?, l: Y8 Q
1734983 ALLEGRO_EDITOR INTERFACES Secondary step model does not stay mapped after drawing is reopened0 A* O" k& V# ]+ E8 _
1753704 ALLEGRO_EDITOR REFRESH Refreshing symbols crashes PCB Editor) ~% l# q- k/ g: E( N6 f; `3 b. G& P
1493721 ALLEGRO_EDITOR SHAPE Voids on negative planes are not adhering to constraints4 D' t* c: S$ Y% Y
1711242 ALLEGRO_EDITOR SHAPE Route keep out leads to partly unfilled shapes with gaps- K! x* S( a4 H! ?9 C9 v8 F; v, k
1726865 ALLEGRO_EDITOR UI_GENERAL Pop-up Mirror command does not mirror at cursor position
6 X9 ?2 Z% q$ x2 ]1752987 ALLEGRO_EDITOR UI_GENERAL axlUIViewFileCreate zoom to xy location not working while in user created form.$ I. I- _; b7 A6 T1 G- w
1755638 ALLEGRO_EDITOR UI_GENERAL In release 17.2-2016, zoom operations using mouse button not working when axlShellPost() is run) O0 E6 D' _" u9 t" Z2 \; x& B
1719792 ALLEGRO_PROD_TOOLB CORE Productivity Toolbox Z-DRC hangs or crashes PCB Editor
6 I' }/ F6 ^0 x/ h/ L1 Y1624869 ALTM_TRANSLATOR CAPTURE A structure file is required to translate a third-party schematic to OrCAD Capture
7 L2 g% P* }9 L1707416 ALTM_TRANSLATOR CAPTURE Missing components and pins in the OrCAD Capture schematic translated from a third-party tool3 I C9 F( z* g1 z8 p; C1 F
1708825 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate the schematic! v- U, ~' Y- s8 ~7 n. }8 g
1719200 ALTM_TRANSLATOR CAPTURE The third-party translator fails to translate all the pages of a schematic
. M1 |" Z( b8 a) k% \$ K+ W1546070 ALTM_TRANSLATOR CORE Third-party to DE-HDL schematic translation fails2 @2 w7 J) ]9 J2 k
1700508 ALTM_TRANSLATOR CORE Third-party PCB translator does not work in release 17.2-2016
9 W0 d+ L* \. U$ x1 X4 X9 B1699340 ALTM_TRANSLATOR DE_HDL Unable to import third-party schematic into DE-HDL using Import menu in PCB Editor
/ [7 R2 g+ g& k) o9 n1630379 ALTM_TRANSLATOR PCB_EDITOR Third-party translator is not importing clines and vias! \% o/ _& H a0 o
1708615 ALTM_TRANSLATOR PCB_EDITOR All items of third-party PCB not imported in release 17.2-2016, c6 s, ?* N% y9 K) V6 M
1758296 APD DXF_IF DXF OUT: Rounded rectangle pads mirrored incorrectly3 g2 K n8 g* U; R/ {; @% x
1756040 APD IMPORT_DATA The 'die text in' command ignores values after the decimal point6 `; l8 v8 U5 Q; M9 c* B
1727206 APD SHAPE Merging two shapes results in an incorrect shape3 s/ {, v3 L: w- h; |- {
1753682 CONCEPT_HDL CONSTRAINT_MG Constraint Manager stops responding while cross probing DE-HDL
0 Q, ~6 _! |7 [# ?: J1 Y1721334 CONCEPT_HDL CORE dsreportgen not able to resolve gated part on schematic
, e* r3 f! ~* o4 l! m2 y3 g1747559 CONCEPT_HDL CORE Copying a logic symbol without a part table entry results in ERROR(SPCODD-53)
' s, {" |- M0 r1 _0 k0 ?9 d ^" G& S1749644 CONCEPT_HDL CORE In release 17.2-2016 Hotfix 019, 'align components' is not working on Windows 8 and DE-HDL crashes1 M% X# [. c1 l& D
1746910 CONCEPT_HDL GLOBALCHANGE Global Component Change unable to identify part data when using schematic pick option4 r# e& g" E" |, Y0 M* _" r
1743572 FLOWS PROJMGR Project Manager displays incorrect values in Project Setting# d y- B; t6 K' ~) l, ~* X ?! y
1724124 FSP DESIGN_EXPLOR Provide TCL command to filter design connectivity window
# J! M& O* I2 f( Z* {9 A1719105 FSP GUI Tabular sorting not working in FPGA System Planner1 d$ s& C' w7 G9 l9 a% o1 r
1755750 PCB_LIBRARIAN GRAPHICAL_EDI In release 17.2-2016, unable to delete _N pins in PDV Symbol Editor* b; L, j2 Q+ V+ ^! H0 S( u( j0 I
1722993 PCB_LIBRARIAN IMPORT_CSV Part Developer crashes while importing part information stored in a .csv file% @! _' N |5 v/ A# K' B
1758856 SIP_LAYOUT 3D_VIEWER Correct the spelling error in the 3D Viewer Design Configuration window
3 O' y, X1 x1 n( Y) [1755179 SIP_LAYOUT ARTWORK PCB Editor crashes when creating Gerber files7 |. Z5 q G+ X8 p& {8 E
1743511 SIP_LAYOUT MANUFACTURING Package Design Integrity shows non-redundant padstacks in the Redundant Padstacks check |
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发表于 2017-7-2 18:36
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楼主
发表于 2017-7-2 19:07
