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发表于 2014-11-16 10:34
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DATE: 11-14-2014 HOTFIX VERSION: 039" J6 B. a- K+ O* h; g8 B7 [
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5 G" G4 z1 @* E' U2 |CCRID PRODUCT PRODUCTLEVEL2 TITLE
/ ?: F' H7 `" y/ P===================================================================================================================================
4 S0 ?. C: N6 p$ Z1213239 FLOWS PROJMGR SPI_ERROR: Missing closing quote at line 41 in""
# v7 U' h/ ?( d: p1301262 SPIF OTHER When creating .dsn file for designs containing netclasses with net groups, PCB Editor stops responding.# ] @7 @3 w* O0 ] v5 f
1301469 CONCEPT_HDL CORE DE-HDL Import Design - Need a directive to enable the "Retain Hard Packaging Information" option by default4 P9 J. w! d* T3 f! j2 M
1309535 SYSTEMSI ENG_PBA PA5700: Cannot print, save, or post process SI analysis reports$ K. B3 Y" r1 p. ?
1317019 SIG_INTEGRITY LIBRARY Buffer model for pins not changing correctly when multiple DML files are present in working directory.
6 D$ P. Q: c, N% D P1318452 ALLEGRO_EDITOR DATABASE Derive Connectivity does not update connections; DRC errors thrown3 D( z3 ^0 z' ~ Q
1318610 CONCEPT_HDL CORE DE-HDL does not re-validate/re-read DML files on disk upon launching Constraint Manager
+ u- I; f! `4 l5 x4 V+ ?1320997 CAPTURE SCHEMATIC_EDITOR Copy paste of multiple images are stacked in same place.
' D* t6 W7 u" U! p/ C& x! F1321377 FSP GUI FSP crashes while performing copy-paste operations between different arrays in the Rule text editor
. o# Z1 y/ r& V, ~% U1321513 ALLEGRO_EDITOR SYMBOL Preview not available for DRA' ~- q; q n* [, F$ y9 T
1324479 ALLEGRO_EDITOR OTHER Option specified in license_packages_allegro.txt file but missing in license server causes Segmentation fault on LINUX$ b2 s- U2 w$ L7 a- K
1327962 FSP MODEL_EDITOR Need ability to select multiple pins in the Preview area of Rule Editor7 w7 @5 m0 H$ n/ Q* ?* S
1328633 CONCEPT_HDL CORE On running Save All, changes were partially saved before DE-HDL crashed.- P/ I r* K; y. M) ?9 m
1328921 ALLEGRO_EDITOR DATABASE Running Derive Connectivity followed by Database Check throws SPMHUT-17 error! a7 m; A1 t7 C
1330029 CONCEPT_HDL CORE PIN_TYPE and PINUSE attributes not updated consistently in DE-HDL design1 u- g; m# @" p9 }1 L3 S
1330580 SIP_LAYOUT SYMB_EDIT_APPMOD When adding a pin using the Symbol Editor the Pin Name is being changed if duplicated
8 c$ D5 F8 ]2 E, p m& n1331028 CONCEPT_HDL CHECKPLUS Rules Checker fails on DE-HDL component.
! D: n' s) t/ @1331051 ALLEGRO_EDITOR INTERFACES Soldermask layer is mapped to both Soldermask solderPaste and Miscellaneous Image Layers columns using IPC-2581B
; v" H9 N5 f* m7 a1333127 CONCEPT_HDL CORE Sheet number in the new window is only the block-level number and not the design-level number
4 W7 e) k8 U" w+ L D. ?5 b1333591 SIP_LAYOUT SKILL Difference in behavior for padstack replace using axlPadstackReplace and command Replace Padstack
$ L" _- b1 a' ?; x% t( i- u$ f1333896 ASI_SI OTHER signoise -f and -k options don't work for net names with consecutive underscores." U7 N* F: }5 l7 \. D/ G' H
1333982 ALLEGRO_EDITOR ARTWORK ARTWORK: Coordinates of the hole get shifted by the "Draw holes only" option.' E# w( \+ p! f
1334302 CONSTRAINT_MGR SCHEM_FTB Import Logic - Import changes only or Overwrite current constraints fails to update signal models.0 j* |. P& I. q+ c/ z- s$ h
1335276 CONCEPT_HDL OTHER On selecting objects near the schematic page border, the border is also selected# D! H! o- c: i* W
1336322 CONCEPT_HDL CORE DE-HDL does not open with maximized window.
; o1 Y6 S: E W) e1 c1336783 PCB_LIBRARIAN IMPORT_EXPORT con2cap fails to export the part to OrCAD Capture format |
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发表于 2014-11-16 10:30
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发表于 2014-11-16 23:52
