True-Hspice Device模型参考手册

snowwolfe

Table of Contents
# a) R0 I$ f+ C( F% l$ AAudience ............................................................................................. iii
+ Z: t! l$ z2 g7 iRelated Documents ............................................................................. iii
Conventions ........................................................................................ iv
Obtaining Customer Support .............................................................. vi
Other Sources of Information ............................................................ vii
Revision History ............................................................................... viii
Chapter 1 - Overview of Models ..................................................................... 1-1
Using Models to Define Netlist Elements .............................................. 1-2
+ q! X* V& r6 X, J0 a8 @Supported Models for Specific Simulators ....................................... 1-2
2 f& p0 f( z1 qSelecting Models .............................................................................. 1-3
Example ............................................................................................ 1-3
Chapter 2 - Using Passive Device Models....................................................... 2-1
% l5 f! \/ M. D3 DResistor Device Model and Equations .................................................... 2-2
Wire RC Model ................................................................................. 2-2
Resistor Model Equations ................................................................. 2-5
" v# _6 G0 X: {# @% M2 }1 QCapacitor Device Model and Equations ............................................... 2-10
Capacitance Model ......................................................................... 2-10
Capacitor Device Equations ........................................................... 2-11
% r" i0 E" t0 v$ _7 c6 gInductor Device Model and Equations ................................................. 2-14
# m( b8 ^2 _# P$ A, \Inductor Core Models ..................................................................... 2-15
Magnetic Core Element Outputs .................................................... 2-18
Inductor Device Equations ............................................................. 2-19
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21
* `* V, D: }+ z, a$ Z2 V5 [7 V. IPower Sources ....................................................................................... 2-30
5 S; c! [: |2 g, kIndependent Sources ....................................................................... 2-30
# x0 {( M; S# Q' s. |9 ZControlled Sources .......................................................................... 2-33
Chapter 3 - Using Diodes ................................................................................. 3-1
7 O; U/ H. Y6 sDiode Types ............................................................................................ 3-2
Using Diode Model Statements .............................................................. 3-3
- ]2 n) l' f: h1 \Setting Control Options .................................................................... 3-3
8 X) j; K0 L' i  J) G3 K  nSpecifying Junction Diode Models ......................................................... 3-5
Using the Junction Model Statement ................................................ 3-6
; }% [; e5 `0 l# i( E% fUsing Junction Model Parameters .................................................... 3-7
Geometric Scaling for Diode Models ............................................. 3-13
Defining Diode Models ................................................................... 3-15
Determining Temperature Effects on Junction Diodes ................... 3-18
Using Junction Diode Equations ........................................................... 3-21
Using Junction DC Equations ......................................................... 3-22
1 l; }% i. k+ tUsing Diode Capacitance Equations ............................................... 3-25
9 {, Q3 C& U8 n, E0 XUsing Noise Equations .................................................................... 3-27
Temperature Compensation Equations ........................................... 3-28
/ [, I  C6 {# a: XUsing the Junction Cap Model .............................................................. 3-32
" {, g3 ]+ o* ?0 l5 X8 `6 W- fSetting Juncap Model Parameters ................................................... 3-33
Theory ............................................................................................. 3-33
4 l. `* l# Y' t! pJUNCAP Model Equations ............................................................. 3-38
Using the Fowler-Nordheim Diode ...................................................... 3-46
" i! M, m; n2 E! K; }Converting National Semiconductor Models ........................................ 3-48
Chapter 4 - Using BJT Models ........................................................................ 4-1
Using BJT Models .................................................................................. 4-2
7 V  l5 a/ A: q" j' ]Selecting Models ............................................................................... 4-2
BJT Model Statement ............................................................................. 4-4
2 k0 V; @/ F5 q1 O, P6 O- UUsing BJT Basic Model Parameters ................................................. 4-5
2 k" a5 j5 f' b. sHandling BJT Model Temperature Effects ..................................... 4-15
BJT Device Equivalent Circuits ............................................................ 4-21
7 n9 }+ T. s8 a8 `9 cScaling ............................................................................................. 4-21
Understanding the BJT Current Convention ................................... 4-21
  J5 y! Y6 p7 \& {: JUsing BJT Equivalent Circuits ....................................................... 4-22
BJT Model Equations (NPN and PNP) ................................................. 4-30
: i( G" o5 s, l% LUnderstanding Transistor Geometry in Substrate Diodes .............. 4-30
% p  _, F: l( E! g: r% DUsing DC Model Equations ............................................................ 4-32
Using Substrate Current Equations ................................................. 4-33
Using Base Charge Equations ......................................................... 4-34
) }$ p4 X, S- l8 EUsing Variable Base Resistance Equations .................................... 4-35
# S$ S7 q+ U7 H7 ?$ jUsing BJT Capacitance Equations ........................................................ 4-36
Using Base-Emitter Capacitance Equations ................................... 4-36
3 B3 y& g% m/ l+ ^1 |1 \Determining Base Collector Capacitance ....................................... 4-38
Using Substrate Capacitance ........................................................... 4-40
Defining BJT Noise Equations ............................................................. 4-42
BJT Temperature Compensation Equations ......................................... 4-44
Using Energy Gap Temperature Equations .................................... 4-44
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
6 ^' X9 t2 |* ?8 M2 S7 [8 TUsing Saturation and Temperature Equations, TLEV=1 ................ 4-46
- ], l4 T+ y1 m1 ~Using Saturation Temperature Equations, TLEV=3 ....................... 4-47
Using Capacitance Temperature Equations .................................... 4-49
Parasitic Resistor Temperature Equations ...................................... 4-51
Using BJT Level=2 Temperature Equations .................................. 4-52
* G2 d3 ~+ h7 H" ^0 H* ^* KBJT Quasi-Saturation Model ................................................................ 4-53
Using Epitaxial Current Source Iepi ............................................... 4-55
1 O7 A' q# T9 c* ?, LEpitaxial Charge Storage Elements Ci and Cx ............................... 4-55
Converting National Semiconductor Models ........................................ 4-58
VBIC Bipolar Transistor Model ........................................................... 4-60
Understanding the History of VBIC ............................................... 4-60
VBIC Parameters ............................................................................ 4-61
Noise Analysis ................................................................................ 4-62
Level 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
' I0 N5 M- l: R/ b3 N. ]Level 6 Element Syntax .................................................................. 4-71
Level 6 Model Parameters .............................................................. 4-72
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
& Y& W* S: T; Y3 f3 @Notes ............................................................................................... 4-79
% H7 h+ W0 T; V3 |) BLevel 6 Model Parameters (504) ..................................................... 4-80
4 p# I# O& I1 W6 c) b4 ]Level 8 HiCUM Model ......................................................................... 4-94
What is the HiCUM Model? ........................................................... 4-94
* r5 o+ V9 [' k  hHiCUM Model Advantages ............................................................ 4-94
Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-96
Model Implementation .................................................................... 4-96
Internal Transistors ......................................................................... 4-97
. _8 S3 S/ R  {Level 9 VBIC99 Model ...................................................................... 4-110
Element Syntax of BJT Level 9 .................................................... 4-110
Effects of VBIC99 ........................................................................ 4-112
8 o1 N% m& v% ]( {2 HModel Implementation .................................................................. 4-112
; ^9 v7 _- ]: q0 ]8 FExample ........................................................................................ 4-119
5 T7 _& ]; X4 }' r0 hVBIC99 Notes for HSPICE Users ................................................ 4-123
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124
Model Parameters ......................................................................... 4-124
Equivalent Circuits ........................................................................ 4-129
DC Operating Point Output .......................................................... 4-131
2 g8 |  N3 }' ~. g+ V/ SModel Equations ........................................................................... 4-132
6 {9 _5 l* M) ~! ~) R& QTemperature Dependence of the Parameters ................................ 4-142
Level 11 UCSD HBT Model .............................................................. 4-146
Using the UCSD HBT Model ....................................................... 4-146
Description of Parameters ............................................................. 4-147
Model Equations ........................................................................... 4-152
. Y7 r5 y8 ^6 B3 F; UEquivalent Circuit ......................................................................... 4-163
Example Avant! True-Hspice Model Statement ........................... 4-165
9 W: ?, l5 X, J, LChapter 5 - Using JFET and MESFET Models............................................. 5-1
Understanding JFETs .............................................................................. 5-2
6 U! y  R" O/ f% D9 k  |; m8 JSpecifying a Model ................................................................................. 5-3
Understanding the Capacitor Model ....................................................... 5-5
Model Applications ........................................................................... 5-5
1 N  i8 O# e9 ~9 m9 \Control Options ................................................................................. 5-6
/ j: D' R+ U- `$ Y- A7 vJFET and MESFET Equivalent Circuits ................................................. 5-7
8 x8 i' b. u+ ]3 f9 sScaling ............................................................................................... 5-7
. d, p9 g  P) E2 GUnderstanding JFET Current Convention ........................................ 5-7
' S  q5 ^& k" @2 [JFET Equivalent Circuits .................................................................. 5-8
% d* b5 `( R0 B+ XJFET and MESFET Model Statements ................................................. 5-13
% q; q8 F. m% d$ P. c( WJFET and MESFET Model Parameters ........................................... 5-13
Gate Diode DC Parameters ............................................................. 5-15
JFET and MESFET Capacitances ................................................... 5-25
4 G7 @4 K9 |* FCapacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
JFET and MESFET DC Equations ................................................. 5-31
JFET and MESFET Noise Models ....................................................... 5-35
Noise Parameters ........................................................................... 5-35
Noise Equations .............................................................................. 5-35
Noise Summary Printout Definitions .............................................. 5-36
JFET and MESFET Temperature Equations ........................................ 5-37
Temperature Compensation Equations ........................................... 5-40
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