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cuilei83

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1#
发表于 2008-8-29 14:48 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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#1 Error [ALG0031] Pin number missing from Pin "1" of Package CAP NP , C2: SCHEMATIC1, PAGE1 (3.20, 2.20). All pins should be numbered. & m0 ]3 r2 k1 X9 R# @$ I
#2 Error [ALG0031] Pin number missing from Pin "2" of Package CAP NP , C2: SCHEMATIC1, PAGE1 (3.20, 2.20). All pins should be numbered.
# @1 v, g3 Y, E#3 Error [ALG0031] Pin number missing from Pin "1" of Package SW PUSHBUTTON , S1: SCHEMATIC1, PAGE1 (1.90, 2.10). All pins should be numbered.
7 u, u- g2 @1 ]#4 Error [ALG0031] Pin number missing from Pin "2" of Package SW PUSHBUTTON , S1: SCHEMATIC1, PAGE1 (1.90, 2.10). All pins should be numbered.
4 E* m, F, i+ R8 S" B5 y' T#5 Error [ALG0031] Pin number missing from Pin "1" of Package CAP NP , C3: SCHEMATIC1, PAGE1 (3.20, 2.60). All pins should be numbered.
5 ~) K. a4 e* s$ z9 o#6 Error [ALG0031] Pin number missing from Pin "2" of Package CAP NP , C3: SCHEMATIC1, PAGE1 (3.20, 2.60). All pins should be numbered. 9 {) Z& c  ^* e5 r2 Z$ V* \  V) E
#7 Error [ALG0031] Pin number missing from Pin "1" of Package R , R1: SCHEMATIC1, PAGE1 (2.50, 3.50). All pins should be numbered.
! u3 {* k2 ?2 R#8 Error [ALG0031] Pin number missing fr om Pin "2" of Package R , R1: SCHEMATIC1, PAGE1 (2.50, 3.50). All pins should be numbered. ) ?7 U& B' J2 x
#9 Error [ALG0031] Pin number missing from Pin "1" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered. 9 `  H0 C. l$ a9 V% w6 d
#10 Error [ALG0031] Pin number missing from Pin "2" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered. 7 A& @- {/ M# G* H$ @# Z
#11 Error [ALG0031] Pin number missing from Pin "3" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered.
* d7 X1 }5 {" c* Y1 i* C2 X#12 Error [ALG0031] Pin number missing from Pin "4" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered.
6 U8 B+ C3 W: P% n8 |#13 Error [ALG0031] Pin number missing from Pin "1" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
- n2 g/ o% q; n+ `3 v: P9 T# Z% K#14 Error [ALG0031] Pin number missing from Pin "2" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. 6 w9 C7 Z. H; c% o9 O8 R: H9 Q
#15 Error [ALG0031] Pin number missing from Pin "3" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
" G1 z0 j7 N& y7 {#16 Error [ALG0031] Pin number missing from Pin "4" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
& Q! {1 h* |5 q1 f! E#17 Error [ALG0031] Pin number missing from Pin "5" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
/ r- Z3 c7 C/ H) N7 Z#18 Error [ALG0031] Pin number missing from Pin "6" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. ' q" U. o. ~1 }% o& |) G
#19 Error [ALG0031] Pin number missing from Pin "7" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. / [+ N4 u/ J6 p6 G, V! _
#20 Error [ALG0031] Pin number missing from Pin "8" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. 9 O5 z$ b5 i( @0 y
#21 Error [ALG0031] Pin number missing from Pin "1" of Package CRYSTAL , Y1: SCHEMATIC1, PAGE1 (3.70, 2.40). All pins should be numbered.
. P, {; C0 V5 [% S6 x#22 Error [ALG0031] Pin number missing from Pin "2" of Package CRYSTAL , Y1: SCHEMATIC1, PAGE1 (3. 70, 2.40). All pins should be numbered.   K" @2 S7 h1 R! S% r2 l* @6 g
#23 Error [ALG0031] Pin number missing from Pin "1" of Package CAP_0 , C1: SCHEMATIC1, PAGE1 (2.50, 2.10). All pins should be numbered.
+ u% w6 J. d, K. \5 L6 a#24 Error [ALG0031] Pin number missing from Pin "2" of Package CAP_0 , C1: SCHEMATIC1, PAGE1 (2.50, 2.10). All pins should be numbered.
* y/ A# K6 e, `6 h1 N1 Q#25 Aborting Netlisting... Please correct the above errors and retry. 1 x0 v7 j) s7 b. k  v' h
生成网络表示产生如上错误，该如何更正？？？
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lihuizju

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2#
发表于 2008-8-29 14:54 | 只看该作者
引脚没有命名。

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3#
 楼主| 发表于 2008-8-29 14:59 | 只看该作者

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怎么修改啊 能不能详细介绍一下？

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4#
发表于 2008-8-29 16:57 | 只看该作者
Number的框框没有任何数字,这是Allgro不允许的,通常会发生这样的问题会在原本的线路图是9.X的版本,然后我们用10.X或更高的版本开启的时候所产生的

1.JPG (37.33 KB, 下载次数: 6)

1.JPG

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5#
 楼主| 发表于 2008-8-29 17:20 | 只看该作者

回复 4# 的帖子

这个改过来了 可是又产生错误了如下
" D. C: X! B7 Q0 ?: ?********************************************************************************
3 X( p( R7 _& A1 O*
/ m( R5 D+ H1 Y- T* Netlisting the design
" g7 a& N) T, W3 c*
. ~( Y! W7 j  t" T" I********************************************************************************
8 k6 R+ X9 S% N/ hDesign Name:
9 X' f5 q( _, M: a% l! z8 UC:\wenjian1\yanli2.dsn3 h7 b" f( a+ ~1 }/ L
Netlist Directory:
' r0 v# E. n, ~' x6 u( e- JC:\wenjian1\allegro
3 P6 h  I, `4 [Configuration File:
- Y3 M- W3 W  {9 xC:\Cadence\SPB_15.2\tools\capture\allegro.cfg- [4 i9 U. ?, a% @. x3 ]2 ^1 o

: A  `. p$ W2 {! S5 I  N$ }2 hSpawning... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"
$ I6 N9 ?3 {6 }- c1 v- G6 a#1 Warning [ALG0016] Part Name "CAP_0_CPCYL1/D.300/LS.200/.034_10UF" is renamed to "CAP_0_CPCYL1/D.300/LS.200/.034_".9 k$ H: ^1 N) Q6 C4 A' s
#2 Warning [ALG0016] Part Name "CAP NP_0_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_0_RAD/.200X.100/LS.100/.".
3 t/ \$ `! L9 H) D" B& [#3 Warning [ALG0016] Part Name "CAP NP_1_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_1_RAD/.200X.100/LS.100/.".5 w1 Q% M- w* p9 c
#4 Warning [ALG0016] Part Name "4 HEADER_0_SIP/TM/L.400/4_4 HEADER" is renamed to "4 HEADER_0_SIP/TM/L.400/4_4 HEA".2 c4 i: f2 V0 C( u( D
#5 Warning [ALG0016] Part Name "8 HEADER_0_SIP/TM/L.800/8_8 HEADER" is renamed to "8 HEADER_0_SIP/TM/L.800/8_8 HEA".  u7 B5 P# [3 Z% i# Z; l% P
#6 Warning [ALG0016] Part Name "SW PUSHBUTTON_0_RAD/.400X.200/LS.300/.034_RESET" is renamed to "SW PUSHBUTTON_0_RAD/.400X.200/L".: S# a4 }- Y: `* O) c8 Y6 F
#7 Warning [ALG0016] Part Name "8051_DIP.100/40/W.600/L2.050_8051" is renamed to "8051_DIP.100/40/W.600/L2.050_80".
0 X0 g( k! H( S% W#8 Warning [ALG0016] Part Name "74LS373_DIP.100/20/W.300/L1.075_74LS373" is renamed to "74LS373_DIP.100/20/W.300/L1.075".
' K1 o$ i; A* E* [9 N9 ?#9 Warning [ALG0016] Part Name "27512_DIP.100/28/W.600
0 X0 R5 Q  H' g# q& ~4 Y/L1.400_27512" is renamed to "27512_DIP.100/28/W.600/L1.400_2".# o3 \2 B5 z% s2 C$ E: |
#10 Warning [ALG0016] Part Name "CRYSTAL_0_RAD/.400X.150/LS.300/.034_12M" is renamed to "CRYSTAL_0_RAD/.400X.150/LS.300/".
# n5 {* w; t8 V/ x* }Scanning netlist files ...' ?1 o1 Y) l- F( Y# t) `8 v
Loading... C:\wenjian1\allegro/pstchip.dat5 O0 e; c0 Q8 x6 h% j1 ~
Loading... C:\wenjian1\allegro/pstchip.dat+ r7 F2 }$ P; n! U) [
Loading... C:\wenjian1\allegro/pstxprt.dat
1 e+ U7 H+ g' b% }* tLoading... C:\wenjian1\allegro/pstxnet.dat' |$ F4 z( l! d; Q. k
packaging the design view...$ f' Y; {& h9 p

  |2 y+ w. v5 V4 U% y8 B  A( h" p. G- jExiting... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"9 M" s% ]$ V( c) ~* K3 J) I1 \
5 `+ w4 X# z7 R1 E
; p; r, l8 \- `5 O
*** Done ***3 w5 X/ r2 U$ G7 T
# r7 s+ [* `- T6 Y
********************************************************************************
0 M" D, M* E4 f& ~! {  z*
2 w' E8 S% U4 E$ O, }0 }* Updating Allegro Board
& m5 H5 h$ S' @' V. z*) Q# I0 `4 ~4 G" f1 M
********************************************************************************6 Z  \8 k- A. k% k3 c; `7 C/ ~
Netlist Directory:' o  D* j# `' w+ o
C:\wenjian1\allegro& Z0 \5 x& q8 H1 Z. m0 I
Input Allegro Board:4 K7 s. B# w2 C5 T& C8 L
C:\wenjian1\allegro\yanli2.brd8 d( e# U" B8 s; I: y
Output Allegro Board:2 i7 k4 c" p* Q
C:\wenjian1\allegro\yanli2.brd
& g+ Q6 Q1 J4 B
7 i$ Y' V5 Y3 @. VSpawning... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd"
- b4 G3 ]0 K4 j' j# c: SReading File : C:/wenjian1/allegro/pstchip.dat              # K& v8 L6 \) ]3 O
(00:00:00.00)
0 K" U" r4 M, I4 {% M( t- mReading File : C:/wenjian1/allegro/pstxprt.dat              ' x4 w8 A( `" v& F
(00:00:00.00)" n5 T+ \8 w% I$ l
Reading File : C:/wenjian1/allegro/pstxnet.dat              ) J7 @8 u. a2 F4 e5 w8 T4 S- a0 E
(00:00:00.00)
( M5 D7 y% l7 I' P2 SStarting to process component instances* a% \4 V1 q# k& \" `

- \3 Z8 o9 P  n6 |, F' ~netrev run on Aug 29 17:10:17 2008( Q0 f' d) v3 K  G+ L) ^
   DESIGN NAME : 'YANLI2'9 Z8 c* q0 \$ ~+ ~3 L, H
   PACKAGING ON Apr  6 2004 19:58:388 c! J7 U6 e8 a/ e/ d% e
* M/ j& p  K  t
' p  U3 E8 _  m; y6 J
12 errors detected8 @9 u0 n( ^' [* w7 z' \
No oversight detected
# l# z: Q/ C% S4 a4 H; d4 M No warning detected3 `  I" Y) i2 U$ E
( U& H% p% a5 l: l
cpu time      0:00:12, f4 B; |  j$ M# b
elapsed time  0:00:006 W( P$ A4 M) G2 d5 {
' l( ~: Z, j$ Z! }

8 d# Y% M: Z1 |9 j( sExiting... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd"" i8 S1 o& V0 Y
Cadence Design Systems, Inc. netrev 15.2 Fri Aug 29 17:10:17 2008
0 }* i7 j1 ?0 E1 G8 i/ E0 J(C) Copyright 2002 Cadence Design Systems, Inc., e8 h5 j; [5 E- r, ~% \) [
7 H2 M; P  @! `8 M3 q. L
------ Directives ------% ~8 p  U5 y- m0 a. i! j% o1 M

- q" U2 O. V+ rRIPUP_ETCH FALSE;0 b' ~, u5 U0 N3 R  F% a
RIPUP_SYMBOLS ALWAYS;
/ c$ c$ e7 j3 P/ ?6 ^9 @MISSING SYMBOL AS ERROR FALSE;
, r3 i' Y+ @: |0 O4 F- T" |SCHEMATIC_DIRECTORY 'C:\wenjian1\allegro';
- r% i  R+ D4 }- T  _  M* ~BOARD_DIRECTORY '';
4 U6 f! d5 x: ?5 m6 F: cOLD_BOARD_NAME 'yanli2.brd';
2 B. f) w* [6 F8 INEW_BOARD_NAME 'yanli2.brd';
# s5 V7 x* l, _9 n% \7 W* V7 n* x# v! Z. M* q
CmdLine: netrev.exe -5 -y 1 -n -i C:\wenjian1\allegro C:\wenjian1\allegro\yanli2.brd C:\wenjian1\allegro\yanli2.brd
) G2 V: E, a3 ~9 E6 Y6 W+ Y6 P. p' u9 h- X9 B. N! v
------ Preparing to read pst files ------
# }  t/ ^+ K' R
7 S3 O. d4 g7 i0 j" G( ZStarting to read C:/wenjian1/allegro/pstchip.dat 6 x; I/ l% g) p6 F$ n4 a: U* Q4 V
   Finished reading C:/wenjian1/allegro/pstchip.dat (00:00:00.00)
" w" c. r, J9 h1 Y8 Y& V& l! j  w1 EStarting to read C:/wenjian1/allegro/pstxprt.dat ; s" S. g5 h2 z0 a9 {' R! `
   Finished reading C:/wenjian1/allegro/pstxprt.dat (00:00:00.00). W1 N9 H: T" [- K1 o
Starting to read C:/wenjian1/allegro/pstxnet.dat
) d6 U, I8 L  l9 u9 W# B3 a   Finished reading C:/wenjian1/allegro/pstxnet.dat (00:00:00.00)! B# F1 ~0 N! A- y- ]+ C
  G' W+ Q( E' v$ V
------ Oversights/Warnings/Errors ------
2 s- r9 P! L7 O6 Q& B2 c/ ?% O. D( @) B6 T, d9 J

2 a0 a  X. Y! w#1   ERROR(302) Device library error detected.
" e  q9 h2 V- W; X; v/ [) O# Y+ y$ [, k" D2 r% [8 {
Problems with device 'CRYSTAL_0_RAD/.400X.150/LS.300/'. JEDEC_TYPE property 'RAD/.400X.150/LS.300/.034' is illegal: 'Package name is not legal.'.
+ f% e# S9 t9 }- Q
$ M* v* {( R. F2 x( S0 ^Device 'CRYSTAL_0_RAD/.400X.150/LS.300/' has library errors. Unable to transfer to Allegro.. e' Y+ [1 M) c# L( W9 T5 a# F  U

3 p/ N/ p+ J/ s" [: Q8 G#2   ERROR(302) Device library error detected.0 W2 l( l' D1 a# e6 G
8 d- P  `# b2 ~
Problems with device '27512_DIP.100/28/W.600/L1.400_2'. JEDEC_TYPE property 'DIP.100/28/W.600/L1.400' is illegal: 'Package name is not legal.'.9 D7 \/ r1 p, n3 R8 i4 f: q
8 G& f/ n, d+ Z* @' c; Q' [
Device '27512_DIP.100/28/W.600/L1.400_2' has library errors. Unable to transfer to Allegro." T. O; B. T# m0 y' a
4 a; U3 P, s( [# J2 t7 G8 ?
#3   ERROR(302) Device library error detected.
" {. i1 A$ L7 a# D( [  _6 K
9 J/ N- y1 r( d+ |* H) y4 }Problems with device '74LS373_DIP.100/20/W.300/L1.075'. JEDEC_TYPE property 'DIP.100/20/W.300/L1.075' is illegal: 'Package name is not legal.'.
# f, R% f+ U0 d# A, O5 ^
8 l3 N7 y6 a. YDevice '74LS373_DIP.100/20/W.300/L1.075' has library errors. Unable to transfer to Allegro.* Y$ I  s- E, @
# ~2 l* u# X* ?* U- u6 _
#4   ERROR(302) Device library error detected.
- }% q2 e% H& K) X5 p0 {* @$ z
# m- E5 {% L1 Z  |, k) d( f. J/ VProblems with device '8051_DIP.100/40/W.600/L2.050_80'. JEDEC_TYPE property 'DIP.100/40/W.600/L2.050' is illegal: 'Package name is not legal.'., _9 O3 j# c8 b. f& \: v8 F, N

+ e6 x+ `+ E' nDevice '8051_DIP.100/40/W.600/L2.050_80' has library errors. Unable to transfer to Allegro.: h3 @8 S( C8 V$ m4 p, d8 E& v% J
: n4 o- m8 [6 R! G3 i; S" ]( H* f2 }
#5   ERROR(302) Device library error detected.) I$ n1 o0 b' g5 p6 Q  _
4 C$ F2 t6 o! d' |* I6 A
Problems with device 'SW PUSHBUTTON_0_RAD/.400X.200/L'. JEDEC_TYPE property 'RAD/.400x.200/LS.300/.034' is illegal: 'Package name is not legal.'.
8 [4 x5 C$ u& q* Z$ m. U5 t
& l0 s0 l$ H3 D# y. D3 EDevice 'SW PUSHBUTTON_0_RAD/.400X.200/L' has library errors. Unable to transfer to Allegro.! d' s1 ~! T$ ^
# p/ b3 h, C0 x- j4 e4 v$ M
#6   ERROR(302) Device library error detected.; n9 b2 L0 E' m  ?

5 G* ~$ W1 o, g+ h6 OProblems with device 'R_0_AX/.400X.100/.034_10K'. JEDEC_TYPE property 'AX/.400X.100/.034' is illegal: 'Package name is not legal.'.
$ ~$ A9 Y# P2 d2 J
, T3 T! ~3 l% @' \- fDevice 'R_0_AX/.400X.100/.034_10K' has library errors. Unable to transfer to Allegro.8 j" F6 |0 Y* a: H7 b, y, K2 j
# l% _% n* }1 ~* I
#7   ERROR(302) Device library error detected.
5 a& _& ~$ a& x% ]7 c9 U9 h+ G3 C  C
Problems with device '8 HEADER_0_SIP/TM/L.800/8_8 HEA'. JEDEC_TYPE property 'SIP/TM/L.800/8' is illegal: 'Package name is not legal.'.# U. t' \: w% h

- o! Q9 }5 f. vDevice '8 HEADER_0_SIP/TM/L.800/8_8 HEA' has library errors. Unable to transfer to Allegro.
% B+ ~) v* Q* D5 e" q; ?  A
5 d0 D2 [. `6 W6 y/ u" R2 r#8   ERROR(302) Device library error detected.
7 v0 y4 z+ P' j8 f
2 H: e/ K! O' g8 g6 Q$ y4 S3 zProblems with device '4 HEADER_0_SIP/TM/L.400/4_4 HEA'. JEDEC_TYPE property 'SIP/TM/L.400/4' is illegal: 'Package name is not legal.'.8 J5 g! y. L- ]) k/ ^- W# Q. n7 F

, R% @/ E( L. R* B4 L$ xDevice '4 HEADER_0_SIP/TM/L.400/4_4 HEA' has library errors. Unable to transfer to Allegro.
' k# Z# ]: x, d8 Q, `
# b+ [" I' L" c  r0 g# r# e#9   ERROR(302) Device library error detected.. h9 {6 _0 H. V/ E) I9 E' C

6 S0 J3 K( R* g5 s: z' X( YProblems with device 'CAP NP_1_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'.
2 h" t+ G! a8 X, i
0 d. b! v) H7 h: B. nDevice 'CAP NP_1_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro., ~+ d/ p5 j1 X4 ~

+ b* @# P$ M( `. d  ]$ }4 |#10  ERROR(302) Device library error detected.
% G2 ^' w4 {! P! q8 y# I* S; \( g: X7 K
Problems with device 'CAP NP_0_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'.$ r! s: A  R" n( T6 z4 q' P) ^3 ^
1 n. K. \, J$ @9 @  T
Device 'CAP NP_0_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro.7 k4 p1 L9 ?; G2 m
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#11  ERROR(302) Device library error detected.5 O* ]' s& v  J" @0 L% B1 d, \! y

- H* I9 A$ ~- B2 v2 zProblems with device 'CAP_0_CPCYL1/D.300/LS.200/.034_'. JEDEC_TYPE property 'CPCYL1/D.300/LS.200/.034' is illegal: 'Package name is not legal.'.
9 A) D: q2 S+ S7 G( Z* V& Q' C9 c& e9 ~; t6 o; H+ a! s4 P
Device 'CAP_0_CPCYL1/D.300/LS.200/.034_' has library errors. Unable to transfer to Allegro.
7 l% V) S) ?+ G' I( t: K) x
' E, J2 e  f" C; ~  w% q------ Summary Statistics ------
- p4 e) O6 \! g6 n
/ s) o2 I# h- d$ u: U# q0 l: m1 R( \1 A# }9 M1 V9 ?
#12  ERROR(102) Run stopped because errors were detectedへ
" l9 }" V$ b% `$ H# s- x+ a! G% D  V3 R' b1 S$ R
; Z  O& j" o/ b9 _( }/ U' `3 p
netrev run on Aug 29 17:10:17 2008- ~, Z  C( ]. j
   DESIGN NAME : 'YANLI2'! _# |2 R0 R% G! ?- `: k$ l" }
   PACKAGING ON Apr  6 2004 19:58:383 Q8 K: w! a' k. |* R

* }' R8 y. e  x& m# V   COMPILE 'logic'; C& A, A. h: p. z  j
   CHECK_PIN_NAMES OFF
- M3 _  e. o5 c# k% _5 m   CROSS_REFERENCE OFF
9 J: j" V5 G6 G" p2 M/ e4 m% L( M* q0 n   FEEDBACK OFF
9 b: b3 J4 M$ s: N   INCREMENTAL OFF
) _5 s% j5 _  y: U4 L* d   INTERFACE_TYPE PHYSICAL
# _; X6 Z7 I; f1 f+ f$ W   MAX_ERRORS 500+ Z) v" P7 C+ R
   MERGE_MINIMUM 5
) e1 T- V9 z+ a! H7 d( v$ p2 D( o   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
  [6 B9 i; u" F, D+ V' c2 F   NET_NAME_LENGTH 24
! m, Z2 y! i! [7 M- c+ h   OVERSIGHTS ON
. Q- x/ E! ?6 D8 G- c0 C- b- o   REPLACE_CHECK OFF4 l1 d5 R* v. Y$ X3 L& E: [4 s' J$ R
   SINGLE_NODE_NETS ON
2 D+ m" K' p  R) H   SPLIT_MINIMUM 09 d# T0 B- F. S( O$ X& @5 f: o4 J5 F
   SUPPRESS   20
  P; C+ G5 N! }  o7 d! P   WARNINGS ON
; g: o/ z0 ]7 B- R* A9 `7 w8 l8 g. S1 }. A0 a" ?
12 errors detected
! E9 m) Y. L$ G+ X( r" g No oversight detected
# X. F* [$ f5 ?  C No warning detected# P3 J6 ^# M, w
: J- Z: c+ U) j+ \
cpu time      0:00:12
9 n$ _" k% i6 q& H) welapsed time  0:00:00
- Z) F) \: k" l2 h; q% i6 L$ B1 ^
/ p2 j- I" V/ |, @5 a; J5 D: v4 V3 X8 B: p: y8 `4 d; `
+ f' _, b8 G2 m; a
*** Done ***+ w- I: L( r( e* C6 k/ R( j4 ~& S( ]
* @  b/ H( l  ~/ y
********************************************************************************
( z) X) F* P2 @0 z, s*
7 x9 E. O2 b8 X+ r* Spawing Allegro
: W9 H3 e8 i  @* b, h' f. ]; l*
3 z2 z# Q7 ^( _% h********************************************************************************
( v3 {2 F2 M) v$ H6 A7 ZSpawing "C:\Cadence\SPB_15.2\tools\pcb\bin\allegro.exe" -mpssession Administrator "C:\wenjian1\allegro\yanli2.brd"
+ T' {3 {6 D$ U+ L# Z$ z# G2 S
) s3 Q0 @  N; t
9 E; _( t% q0 ?6 C* \% U: `*** Done ***
. W- x- L# |* {5 Z* z怎么回事

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cuilei83

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 楼主| 发表于 2008-8-29 17:25 | 只看该作者

文件如下 请高手再指点！！！

谢谢  orz

wenjian1.rar

17.91 KB, 下载次数: 10, 下载积分: 威望 -5

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chyp840527

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发表于 2008-8-29 22:45 | 只看该作者
帖子不要发一大串，看的不爽，没心情帮你改错，同类型错误发一个就行了，把所有的错误都发出来，自己不分析一下就来问，那是对自己的不负责

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lihuizju

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发表于 2008-8-30 00:24 | 只看该作者
'Package name is not legal.'.说得很清楚嘛，封装命名有问题，出现了非法字符。Allegro中的封装名不能出现“.”似乎“/”也是非法字符。唉，其他的就不说了。

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cuilei83

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 楼主| 发表于 2008-8-30 10:38 | 只看该作者

刚开始学啊 有很多不是很明白

不好意思啊 我用的封装是layout 中的  是不是allegro 中的封装不能用layout中的？？？谢谢诶

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