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我的还是不行呢,/ n- p' E" G' N+ S: Q a, e
Translating E:/SPB16.3/Allegro/temp/project/S713OBX_SUBFPC/S713OBX_SUBFPC_V1.01(110503)0950.asc.
/ s; e; B( ]. Q. S1 g3 oUsing translator version @(#)$CDS: pads_in.exe v16-3-85D 11/3/2009 Copyr 2009 CADENCE DESIGN SYSTEMS.' @0 X" d9 U Z
Reading PADS ASCII file header.
+ s. \ @ {- g/ x0 g Version = PowerPCB4.0$ G1 T! E( {. B: m6 G( u
Route Layers = 2
. i4 J7 R {+ z0 H" p* @ Units = METRIC
1 r/ u5 W; {: H9 H Hatch mode = Vertical / Horizontal! J8 z1 m3 }) B; H/ k* l; ]+ j
Hatch grid = 0.100000, angle = 0.000000, anti-pad spacing = 0.000008) y' u" J6 f5 Z2 ]$ w5 y$ B
Initializing new database.
4 g: h1 ?0 p! a# Q" i Creating layers.4 s5 D/ T: T1 D) h% k- h
Reading PADS ASCII file body.! i& L0 n7 {1 O# ~
*MISC*; l: r5 c; S3 z$ Y, a+ t& d! o: q
*MISC*
1 G" `% U+ d2 W1 _& F) r zInformation: CSet 1_5_6 renamed to DEFAULT- ~% ]" j, c. z8 \) B6 t5 v
' S* B5 t6 d5 _3 X0 \Warning: Allegro doesn't support default electrical CSets.' g. w" z- j7 W- b# y
*MISC*
1 a: S: X" v3 @7 W6 c *MISC*9 P1 _7 _( @" @8 j. c/ ^
*MISC*! }2 H7 j, I# V5 r" H, ~( W3 T2 C
帮忙看一下什么问题呢, |
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