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本帖最后由 yueyuan2003 于 2012-12-17 21:14 编辑
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别的地方找到的更新说明，其实干嘛老是跟着公司更新软件啊，我就觉得16.3挺好的，功能就很好了$ f) L& m# e& Q; b( o" t
DATE: 12-18-2012 HOTFIX VERSION: 001: \2 w- `. i( F% t
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2 i* a- L% h; _2 n; E2 V: XCCRID PRODUCT PRODUCTLEVEL2 TITLE' J2 T. E; q& r4 u- {
===================================================================================================================================; }! j3 G5 e' V1 L! O
501079 ALLEGRO_EDITOR MODULES Enhancement for Module swap function similar to component swap
# k/ ~7 `% V5 ~# i2 U5 m/ J9 c745682 CONCEPT_HDL CORE Attributes window requires resizing each time DEHDL is launched
+ Z) O+ W8 a- n3 n+ b3 B825846 CONCEPT_HDL CORE The module_order.dat file gets corrupted
1 R/ L( x1 |9 p7 m6 J) L: q871886 CONCEPT_HDL CORE Browse button in Signal Integrity window of DE-HDL option causes program crash- L1 [. O+ l( Q6 N0 I, ^+ k; I
891439 ALLEGRO_EDITOR INTERACTIV moving cline segments
. s: Z9 F' \$ x6 r( }898029 CAPTURE PRINT/PLOT/OUTPU ENH: TCL:To show net alias clearly in print out if alias has underscore
& ?( s4 f* }5 W6 z923210 CONCEPT_HDL CORE Search with multiple properties does not show all properties
# F; O, u0 }& @938977 CONCEPT_HDL CORE Properties attached to standard/DRAWING symbol does not propagate to parts placed in the schematic2 }% k# N7 \: l c/ q# W
947451 ALLEGRO_EDITOR INTERACTIV Allow the tool to select multiple shapes when assigning a net to more than one shape.
0 M! s; G7 S Y8 r0 n968646 ALLEGRO_EDITOR EDIT_ETCH The Cline to Pad spacing not followed for Multidrill pad it is more then minimum spacing) h8 n8 o2 D, |& L7 X) F% d. C
976723 ADW MODEL_MANAGEMENT SI DML Model has to be provided the Auto Generate function for discrete components on DBeditor! L8 m( f# S! }+ j- m W
981767 SCM UI Add series termination in ASA will crash if both output and input pins are selected.# |( w. V: k P8 d4 H8 ]( _
982273 SCM OTHER Package radio button is grayed out1 `% g; G# W+ ]4 P4 G
988438 CONCEPT_HDL CORE Visible constraint disrupts MOVE command5 b0 A8 A. |- M" n2 V- K
989471 ALLEGRO_EDITOR INTERACTIV Functionality to zoom to the selected object in Pre Select Mode3 I, k; V/ o% x, ^5 y# O5 s
993562 CONCEPT_HDL INFRA After upreving the design save hierarchy is leading to WARNING(SPCOCD-34).0 Q8 O7 W+ i$ W$ `) a' [
996577 SPECCTRA ROUTE Specctra not routing NET_SHORT connections- O# V; \3 r* A6 q
997992 CONCEPT_HDL CORE Why are Page Numbers not enumerated correctly when multiple TOC Symbols are used?
5 I" k3 n' L b" Q8 n1001300 PSPICE MODELEDITOR BUG: Simserver crash with encryptedm model
$ G. P/ @: v' _" Q1 v; Y4 k1010124 PSPICE SIMULATOR Monte Carlo summary doesn't list all the runs in case of Convergence error in one of the runs4 S6 z; c& d$ j* j8 D4 Q
1013656 SCM OTHER create diff-pair should honour diff-pair setup or ask user for positive negative leg9 @0 G4 U1 ]5 W. o/ m/ `
1013721 ALLEGRO_EDITOR EDIT_ETCH Routing near a 2x3 multi drill padstack does not maintain the spacing constraints.% h1 K+ t4 p: P
1016859 SCM REPORTS dsreportgen exits with %errorlevel%
4 r1 g$ J) z6 ^% n1018506 ALLEGRO_EDITOR INTERACTIV Edit copy with retain net of via will assign net to pin7 ?" D9 k2 C: g H- B
1020746 CONCEPT_HDL OTHER PDF Publisher tool behavior inconsistent between OSs
. J; V& A; A/ B7 k7 T2 Q$ c1020798 SIP_LAYOUT SHAPE Shape not voiding on layer 2 causing shorts' k! |8 J8 \. |: T. ^6 d
1023051 SCM UI Wrong and incorrect message is generated while adding connectivity in SCM matrix view � DSTABLE-140. w/ Q+ v! e( y4 O8 u @
1023774 APD WIREBOND After "xml wire profile data" is imported it isn't reflected to actual wire.% y j8 Y; C% P4 b% G# }7 S! d( s& @
1023807 SPECCTRA GUI Unable to close SPECCTRA using File > Quit or by clicking on standard window red close cross button+ ?. v. L* y- O" a# h& _
1024239 ALLEGRO_EDITOR INTERFACES DXF pin location is moved when I execute DXF out
5 _% N" w: X/ N4 Q; q- g1028237 CONCEPT_HDL HDLDIRECT Error binding design when generating simulation netlist
- n; ]9 C: }/ }- R" \8 M1030591 CAPTURE LIBRARY Library Correction utiltiy locks the library and deosn't frees it even after being closed6 |( H: k5 t0 t8 s9 b& t+ L
1035624 CONCEPT_HDL CORE Options pre-selected when launching base product% w/ m' y2 _" e. y; h
1035896 SIP_LAYOUT ASSY_RULE_CHECK Rule Wire Length under Wire on line in Assembly Rule Checker doesn't work correctly$ a, A' z9 [( |/ U
1036580 ALLEGRO_EDITOR MODULES Module created from completely routed board file has lot of missing connections in it.
+ ~: i# _* b3 Q1037345 ALLEGRO_EDITOR INTERACTIV Enhance Allegro's Snap-To tools to select the origin of a sub-drawing(clip file)
2 r3 u# V0 S4 m- ~1038180 ALLEGRO_EDITOR DRC_CONSTR BGA escapes not being calculated in phase tol! C1 ~: V% ]# a0 \* J* B# x
1038285 SCM UI Restore the option to launch DE-HDL after schgen.
) o0 \9 o6 o2 U2 G' `1038371 ALLEGRO_EDITOR INTERFACES Import > IDF fails with error "(SPMHDB-187): SHAPE boundary may not cross itself."1 m& Z! n0 S+ j8 F- ]
1038577 ALLEGRO_EDITOR DATABASE Modifying Void crashes Allegro
& G0 Z. p2 e: I7 ~; z$ P1 |: [1039112 ALLEGRO_EDITOR ARTWORK Antietch and Boundary layers deleted when Match Display selected b x% t2 _6 {0 f+ v) c) w
1039147 ALLEGRO_EDITOR COLOR Need an option to change color of Text marker and Text select in Display listing
' T) g/ J' C0 y. P$ O3 I1040653 ALLEGRO_EDITOR DATABASE Cannot update netlist data, ERROR(SPMHDB-121): Attribute definition not found.
6 ^: o' \! p$ f2 D1041368 APD DEGASSING The Degas_No_Void properties assigned to Cline does not work.) D) }+ F I$ x9 X4 p, N
1041864 ALLEGRO_EDITOR MANUFACT Allegro crashes when opening the Backdrill setup menu! y& D( a7 _; M% q/ L, D2 }
1042199 SIG_INTEGRITY SIMULATION Waveform list was not refreshed by switching tab.5 o- T0 U+ \5 }5 A4 h
1042348 SIP_LAYOUT STREAM_IF GDSII export includes the full refernce path, breaks CATS flow+ X, t- M5 h2 @
1043861 SIG_INTEGRITY REPORTS Derating values are NA in bus simulation report when derating table is not in working directory' u! n) t, M6 S1 A3 j! L
1043903 GRE GLOBAL This design crashes during planning phases in GRE.
2 E1 N- `8 j( C5 X5 q7 S1044029 PSPICE ENCRYPTION Encrypted lib not working for attached
6 n% s" b+ R3 I6 U% Z+ o1044222 ALLEGRO_EDITOR INTERACTIV Capture Canvas Image changes working directory! n; n" H, B/ a. ~) Q3 r
1044264 PSPICE SIMULATOR Why does the 'ORPSIM-15009:This device scales to 0.0 at this Temperature' Error occur.+ u4 H& d7 |3 P; t3 K
1044577 GRE CORE Plan > Topological either crashes or hangs GRE
1 E% f8 l0 T4 g* c/ G0 h% L/ z8 L1044687 TDA CORE tda does not get launched if java is not installed: Q" D9 d+ H# n9 {% \3 C' F
1044754 SIG_INTEGRITY SIMULATION Incorrect waveforms when simulating with stacked die
5 Q8 R5 R$ u5 U5 G" L8 |+ \1045607 ALLEGRO_EDITOR OTHER Component get placed even after Cancel IDF in form.- {/ x* A0 ?: r6 g G
1045694 CONCEPT_HDL INFRA Why to package the design twice to pass the net_short property to the board?* Q5 y3 h$ t- y( m
1045863 CONCEPT_HDL INFRA Customer had the crash several times when they run script with SPB16.51.6 b6 V3 \6 F/ Q% v$ W0 J; Q' h5 K
1046929 CONSTRAINT_MGR OTHER Unable to create physical of spacing cset after rename the default cset in design entry.# D; o: Z5 } f# g" |6 x
1047590 ALLEGRO_EDITOR SCHEM_FTB Buses created in Allegro-CM are deleted by netrev in traditional flow
- ~2 ]5 D# O( y: B6 `1047823 CONSTRAINT_MGR OTHER acPutValue predicate text not being displayed at bottom of Constraint Manager window./ P* k: q( g, {7 x% t B# j
1048403 ALLEGRO_EDITOR SKILL Allegro crashes opening more than 16 files with skill
3 y) E# P0 c: {# o4 V1049262 ALLEGRO_EDITOR OTHER APD and extracta crash owing to Wirebond.- O( F, l* q+ k
1049303 CONCEPT_HDL CORE Block rename deletes schematic data immediately in 16.5" w9 o6 H$ N' i
1049317 CONCEPT_HDL OTHER bomhdl with scm mode not working on RHEL in 16.54 H& Q) U4 u& P3 z. [
1049399 SIG_INTEGRITY OTHER Toggling z-axis delay in CM shows the same value) h: J ?9 g9 x4 v
1049956 ALLEGRO_EDITOR DATABASE BUG:dbdoctor deletes fillets as design is migrated from old version4 L& q* V# M. ?) H
1050408 APD DXF_IF Symbol has 45 degrees rotation in mcm but DXF doesn縯.7 t5 r- t: t1 `6 C2 |7 E
1050483 ALLEGRO_EDITOR DRC_CONSTR DRC has been waived but after updated DRC system generated a new DRC.6 W" a2 Z# G1 G5 s8 ~+ B" @% ?
1050918 ALLEGRO_EDITOR MANUFACT Testprep Automatic generate testpoints with wrong padstack Itype in SPB165S026.
/ i7 c) t, V4 [& P0 W2 ^1051588 ALLEGRO_EDITOR PAD_EDITOR Pad_Designer library drill report omits some drill holes+ r( a7 _/ }7 P" B, f* J; d9 s
1052005 SIG_INTEGRITY OTHER Huge difference in Z-Axis delay with the latest hotfix for 16.5 that did not exist in older ISR's of 16.5.
6 a1 v$ g1 U7 s1052045 ALLEGRO_EDITOR OTHER Bug - Thermal relief connects not sustaining 15 degrees component spin in version 16.5 unlike v16.3
7 ]5 T5 {5 [* Z* L( n+ G1052449 CONCEPT_HDL COPY_PROJECT Copy Project does not update all relative paths in the cpm file3 t* B( `/ q7 u9 H6 p
1052600 ALLEGRO_EDITOR SHAPE Adding a specific cline causing shape errors8 e: x) q) O1 T+ z+ L8 F5 j
1052753 ALLEGRO_EDITOR DRC_CONSTR Allegro showing soldermask drc only when the symbol is rotated.
4 b* ]$ H/ N8 t1054235 ALLEGRO_EDITOR PLACEMENT Cannot place alt_symbols for mechanical parts.! v) L+ o( p/ x# \5 W: `
1054269 ALLEGRO_EDITOR MANUFACT Backdrill Setup and Analysis crashes on attached design
# w& n" E' j6 D; X9 V3 [+ t1054351 ALLEGRO_EDITOR SHAPE Shape voiding fails for board having diffpairs with arcs
1 q! g2 y" Q, X+ G& O6 H1054456 ALLEGRO_EDITOR MENTOR mbs2lib incorrectly translates refdes label% F" A- ^! L6 K: M! X% e" ]; ^1 b
1055273 ALLEGRO_EDITOR INTERFACES DXF exported from Allegro has an offset in pad location for Y- direction., S) T9 e; {3 D! }. g* A
1055328 CONCEPT_HDL COPY_PROJECT Project Manager - Project Copy$ U* R& ^/ i! X" s4 C% Q) n
1055481 APD SHAPE keepout does not clear shape unless it's picked up and dropped down
/ G% B& n2 f: O/ X1055729 CIS GEN_BOM Standard CIS BOM per page is not working correctly with option Process Selection
y3 i/ {; |) T! f1056418 ALLEGRO_EDITOR OTHER PDF exports the blank text markers whether or not the markers are visible.
- } v9 d* u6 A9 R+ H; W6 Y1056579 CAPTURE OTHER Ability to define custom variables for titleblocks that update for specific variant views
4 N0 t! ]* s0 X9 e* o- g/ _1057003 ALLEGRO_EDITOR SHAPE Z-copy to create RKI does not follow board outline4 O h2 p6 ]3 A0 d R8 f, t7 z
1057976 ALLEGRO_EDITOR DRC_CONSTR No Same net Spacing DRC on attached design. p! I( d7 l) `" k
1058002 SIG_INTEGRITY SIMULATION Incorrect Xtalk sim netlist was created.$ u3 f2 o( D& P6 x" O- g0 \
1058364 ALLEGRO_EDITOR SKILL axlTransformObject() is moving refdes text when only symbol pin is selected for move( k& }, o4 f8 O" N& T @ }* [1 k; C
1058940 ALLEGRO_EDITOR INTERFACES IDF(PTC) out command output wrong angle value5 n3 ?1 \7 J! `7 G; h1 a8 f
1059037 CIS PLACE_DATABASE_P What enables the Refresh symbol libs option under hte update menu in CIS explorer1 N/ a2 S$ y- k/ a& D8 }4 f8 A
1059389 ALLEGRO_EDITOR MANUFACT about back drill analisys report
3 e: V }3 y d! z1059901 CONCEPT_HDL CORE Global Property Change and <<OCC_DELETED>> property value.8 [) m# p, m$ B& V) M
1060428 ADW DESIGN_INIT ADW Flow Manager Copy Project fails to complete
0 ^! O3 h' [; ~0 B, r1060589 F2B PACKAGERXL Packager Fails with ERROR(SPCOPK-1053): Cannot find a ppt part that matches the instance properties.; n/ p2 N: C9 a2 x
1060977 F2B DESIGNSYNC back annotate in 16.5 does not bring in already placed nets as global nets: K J: P' a( S
1061223 CONCEPT_HDL CHECKPLUS What determines a passthru pin?
# l& n- {7 S' ?" B4 S" A! c1061424 CONCEPT_HDL CORE Customer creates <<OCC_DELETED>> property values.$ y! n/ W. F/ w0 p) O) X& h
1061572 ALLEGRO_EDITOR INTERACTIV Shortcut keys wont work after "Edit Text" command is finished.
# z6 ]& p: E! g1 f; n0 k1061659 ALLEGRO_EDITOR DATABASE Unable to return drawing origin to 002 V3 q5 z$ n' R5 ^5 B5 c
1062558 APD DXF_IF If set both in X and Y offset DXF only get one and not get absolutely value in 45 degree rotation0 B u+ w1 t# `) `. N
1062982 ALLEGRO_EDITOR MODULES Module containg partitions has been imported to the main design and cant be refreshed.+ j4 H% ^" m' U. v/ N1 _
1063284 PCB_LIBRARIAN OTHER PDV Save As is broken
7 f0 w" G f- \8 S% u1 `1 c1063658 ALLEGRO_EDITOR SCHEM_FTB Allegro Import Logic does not remove library defined diffpairs
: X* P& P5 p7 ?- j- S. Y1063778 CONCEPT_HDL CHECKPLUS The hasSynonyms CheckPlus predicate is not returning true for all global signals.
% c7 ?2 ]9 b/ G+ v# i& H1063924 CONCEPT_HDL CONSTRAINT_MGR Highlight the net between DE-HDL 16.5 and Constraint Manager.6 r4 ~9 J/ g+ B/ r k. n, P
1064707 CONCEPT_HDL CHECKPLUS Rules Checker core dumps on design
$ F6 I" @+ Z- d4 X# \6 P) s9 q/ ]! f1065124 PCB_LIBRARIAN SETUP PTF properties cannot be deleted from the setup in PDV
s; |4 }; H! p1065618 CONSTRAINT_MGR ANALYSIS DRCs on board but Constraint Manager shows the columns as green.
8 a& E; M& a T- N7 q, c) y1065641 PCB_LIBRARIAN CORE PDV symbol editor is crashing when deleting a group using delete or CTRL+X
& m2 U1 p& q$ q1 o6 o1065745 SIP_LAYOUT DATABASE The logic assign net command crashes the application1 F. p" {8 X$ N9 w9 ]* Y
1065860 ALLEGRO_EDITOR REPORTS Design crashes when running a padstack usage report
" w8 t. y0 L: v" x5 [1066051 ALLEGRO_EDITOR TESTPREP Auto Testprep generation creates TP with Testpoint to Component Locatin DRC; N# P" p! b5 r, w& t4 A1 ^4 W0 C: U
1066318 CONCEPT_HDL CREFER Issue with LOCATION visibility in flattened schematic* ~1 S, d6 [' Z
1067339 CONSTRAINT_MGR ANALYSIS Relative Propagation Delay analysis in the Partition file seems very inconsitent.( ?' T% z9 r0 f0 P
1067984 SIP_LAYOUT OTHER layer compare batch fails with write protected file2 v0 P( B8 t. ]5 n2 x
1068425 F2B DESIGNVARI Out of memory message in Variant Editor while 縞hange properties� command
1 ]* m' j/ m) g1 d1068547 ALLEGRO_EDITOR EDIT_ETCH Outward Fanout is not fanning out this 4 sided part as intended* b( H, a/ A3 x; q6 o
1068966 SIP_LAYOUT DRC_CONSTRAINTS DRC update aborts on this design with ERROR -3000067% p& h; d' a$ i# J
1069215 CAPTURE DATABASE Capture Crash on usnig a TCL utltiy to correct design, B% G! B: a. ~3 `
1069517 SIP_LAYOUT DIE_EDITOR change die abstract pins tab default action from delete to modify
8 b7 z6 R% ~0 x1 i0 Q# V7 o7 o1069915 ALLEGRO_EDITOR EDIT_ETCH Allegro hangs with when doing spread between voids0 f y3 z3 C) S& U" ?7 x/ ?$ T
1070007 ALLEGRO_EDITOR PLOTTING Export IPF omits drill figure characters for backdrill holes0 P' e( C" [$ i6 ]+ F) }
1071722 SIP_RF DIEEXPORT Virtuoso SiP Architect not writing out pins to the .dra needed for LVS flow
3 _% j/ e" e! v/ M1 a0 X1072067 APD EXTRACT When expoting using Extracta oblong pads with anyangle are abnormal
7 Q) `9 B4 F8 G7 |! ^4 y: h# w7 p1072791 ALLEGRO_EDITOR DATABASE Database check cannot fix error and keep report the same issues cause artwork cannot export.. ^/ q( m" u5 n" Z( m
1072806 CIS EXPLORE_DATABASE Query tab in CIS explorer doesn't show searh fields in 16.66 H8 \9 R; }$ `" ?, G
1072843 ALLEGRO_EDITOR PLACEMENT The move command that was present in the right mouse pop up menu during manual placement is missing in 16.5) C+ W; V F/ L3 B2 a) M
1072904 SIP_FLOW SIP_LAYOUT Probe pins not being mirrored in Die Editor correctly in Chip Down mode.
7 n+ S. U6 {' ?- y8 A. s1073237 SIG_INTEGRITY GEOMETRY_EXTRACT Some nets has no result at Bus Simulation and Comprehensive simulation.5 e! n: F& F5 b2 P0 p+ N
1073445 ALLEGRO_EDITOR GRAPHICS 'infinite cursor graphics fail -ghost copies as you move cursor/ C8 L5 b) _& d
1073464 SCM SCHGEN Schgen never completes.
9 X$ R- Z4 G* R* A8 @8 A1073587 SIP_LAYOUT OTHER axlSpreadsheetSetWorksheet command clears the cells in memory
: ?) R6 M* y' L" [) a$ O9 i9 a7 e1073745 CONCEPT_HDL CORE Import design fails/ I, Z( k- u( @1 I$ d4 ^" h
1073852 ALLEGRO_EDITOR INTERACTIV While doing a Copy Via use the last 'Copy Origin'
( ] o J! X, L1074279 ADW DSN_MIGRATION Design Migration fails purge if there are cells with BODY_TYPE, J6 e" N* J: G% `
1074791 CONCEPT_HDL HDLDIRECT User gets port exists in schematic but not on symbol message even though the port does not exist: ^" A! V _* }
1075135 ALLEGRO_EDITOR DRAFTING Ability to edit dimension text block in Instance Parameter7 o' P0 z- U/ k' u2 ]
1075151 ALLEGRO_EDITOR SHAPE Cannot change global shape parameter back to thermal width oversize after having used fixed thermal( T2 g$ W, Z. R/ B' {. e( F
1075256 ALLEGRO_EDITOR OTHER Import > IPF in 16.5 is dropping data.
# f+ u7 |' @0 T" y6 d% q1075853 ALLEGRO_EDITOR REPORTS please add "PART_NAME" at Extract UI$ T' w0 F$ O% G- X- B+ B" h5 x. D
1075934 ALLEGRO_EDITOR DRAFTING Able to Changing Dimension Text Block4 ` S1 p0 Y# ^% F, b
1075955 CAPTURE SCHEMATIC_EDITOR ZOOM in 16.6 using key "I" on keyboard in not centered on mouse pointer
0 B7 w1 E2 ~2 z) h. P- h1075964 ALLEGRO_EDITOR SHAPE Shape voiding is not consistent in conjunction with odd angle and arc traces0 S E# q, S9 @5 A
1076086 SIP_LAYOUT IMPORT_DATA missing wirebond after import SPD2% ]" M% y5 I" X5 d
1076202 ALLEGRO_EDITOR EDIT_ETCH Allegro add connect causing crash after Hotfix$ O( ^* q% R+ B7 C, y
1076205 CAPTURE PRINT/PLOT/OUTPU : Printing of User Assigned RefDes% M* u0 ?+ V9 V- Q. j
1076536 ALLEGRO_EDITOR DRC_CONSTR Embedded component which protrude out toward Top do not create DRC with Place Keepout on Top
+ ~ r- z1 x* X- b) w. C1076538 CONCEPT_HDL CORE Property visibility changes in attribute form not updated in schematic canvas.
4 E% ]9 D. w" s2 b1 ~: n. }1076655 APD DXF_IF Dxf does not get offset value if die symbol padstack has offset value6 D3 L, K" T. t; |
1076846 ALLEGRO_EDITOR EDIT_ETCH Grid snapping broken after slide in 16.6
0 F) e* J' v0 _& M. K+ H7 P1076891 ALLEGRO_EDITOR INTERACTIV Symbol rotation not displayed correctly when defined as a funckey
" z! {- i- S, h* V) k# y1076909 ALLEGRO_EDITOR DRC_CONSTR Allegro crashes while placing modules from database
$ w. ^& i) @ Z/ m- l1077084 CAPTURE NETGROUPS Crash on selecting bus when Enable Global ITC is unset. a) \' F$ @$ W- m. w, Y# P
1077169 APD SHAPE Shape > Check is producing bogus results.* |' `3 _, y, M P O9 Q
1077572 ALLEGRO_EDITOR DATABASE Mechanical symbol created with 16.6 cannot be placed on board.
& T0 d4 y- A& ^: E- a& `/ I$ f1077879 ALLEGRO_EDITOR SKILL Allegro Skill axlDBCreateFilmRec fails when 15th argument missing "draw hole only" for the first tim
, I8 i8 H. A* @1078380 SCM OTHER Custom template works in Windows but not Linux
: T& b8 _( A( H# ]( X; z) Y# E1078497 ALLEGRO_EDITOR INTERFACES Import DXF does not seem to work correctly.
& l! ]) B d) ?# e1078682 ALLEGRO_EDITOR DRC_CONSTR Unaccetable slowness with Slide
- K0 j+ M+ J T# F* G/ Y1079082 ALLEGRO_EDITOR PLACEMENT Swap components, gives error SPMHGE-616, when symbols instead of components are selected for swapping' y( {7 z1 @! Z @
1079533 ALLEGRO_EDITOR PLACEMENT Swapping components in 16.6 results in Error "E-(SPMHGE-616): Symbol and layer embedding requirements do not match"1 b8 w! f x# K2 w+ @
1079937 CAPTURE SCHEMATIC_EDITOR ZOOM in 16.6 is non uniform on text
. ^ V7 E$ p- q$ q1082582 ALLEGRO_EDITOR GRAPHICS Allegro hangs on a given testcase using the MMB zoom control
7 I5 C3 w5 N F) J" Z7 W1082981 ALLEGRO_EDITOR SKILL Allegro crash while change the new symbol type as mechanical.$ z# T& s9 h. T" A) E, K8 h
1083230 SIP_LAYOUT SHAPE Shape fill in 16.6 releaase not fillilng shapes as good as it did in the 16.5 release.
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发表于 2012-12-17 12:49
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发表于 2012-12-17 16:50
