Hotfix_$PB16.50.013

yulizi

8 m- P0 s& \9 |& {0 }9 W' {9 B$ bhttp://kuai.xunlei.com/d/DGOHIFKLICUP
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. @( _' u; m) p: y. e$ r6 Y# MDATE: 12-16-2011   HOTFIX VERSION: 013
2 `$ e7 T8 Q( p+ \  d/ c9 i6 Y, m; ^===================================================================================================================================
CCRID   PRODUCT        PRODUCTLEVEL2   TITLE
===================================================================================================================================
875695  SIG_EXPLORER   INTERACTIV       Enforce Causality check box doesn't work.
927148  CAPTURE        PROJECT_MANAGER  Capture crashes on creating scehmatic folder with name which already exists in design
1 x+ d8 I' _% W' c; B938013  CAPTURE        NETLIST_OTHER    The netlist in RINF Format contained two identical lines for PCB FOOTPRINT
941409  PSPICE         PROBE            BUG : Search accuracy wrong in new cursor window
945242  SIG_INTEGRITY  SIMULATION       Unable to select "shapes" in find filter for 'show parasitic ' command
946293  CONCEPT_HDL    ARCHIVER         Archiver hangs if there is a whitespace at the end of the path of cref.dat
- O! f" [5 G2 F* b6 f# ]+ n8 w946770  CONCEPT_HDL    CORE             揤iew Design?function is missing in Windows Mode after reseting the menus.
950994  CAPTURE        NETGROUPS        Problem in expanding the netgroup in Auto Connect to Bus function
953530  SIG_INTEGRITY  GEOMETRY_EXTRACT Display Parasitics is displaying wrong results for EMS2D Field Solver compared to topology extraction using Probe.
* o) a2 X, y- O! v' }953713  CONCEPT_HDL    PAGE_MGMT        Random page replacement/duplication in block
7 t$ n$ N6 N0 s2 i7 Q$ W953917  CONCEPT_HDL    ARCHIVER         archcore should handle errors correctly
4 }3 C# z/ Q/ P953971  ALLEGRO_EDITOR MANUFACT         NC Drill files not generated correctly when using the option "搒eparate files for plated/nonplatedholes?
954400  CAPTURE        NETGROUPS        BUS members of NetGroup are getting converted to Scalars in Export-Import NetGroup.
954498  SCM            B2F              SCM crashes when importing physical
954623  ALLEGRO_EDITOR EDIT_ETCH        Unable to complete connection with Add Connect - related to soldermask to cline check?
954894  ALLEGRO_EDITOR MANUFACT         Dimensions disappear when opening database in v16.5 from v16.3
2 n. b) |1 r7 B. B- ~955029  CONCEPT_HDL    CORE             custom text font size not recognized in symbol view
6 M6 d/ _% k+ S; d3 n. e$ |$ B- ]955133  SIG_INTEGRITY  FIELD_SOLVERS    The Field solver creates the differential trace model which is reversed T(D1) and T(D2) of bottom side.
$ r3 m2 Q- ^  q0 b955290  CAPTURE        DRC              Description for UPD0014 missing in the Browse DRC markers window
955299  ALLEGRO_EDITOR DRC_CONSTR       drc text to smd pin does not work any more on this database in 16.3 S039
' ~6 @6 v5 y( }1 n  p, r, @955338  CONCEPT_HDL    CHECKPLUS        Need to change PART_NAME
; Q' y$ @+ `1 f$ K, I+ o955447  SIG_EXPLORER   OTHER            Model path set in DE HDL Model Assignment not used by SigXP from CM in DE HDL
955740  SIG_INTEGRITY  GEOMETRY_EXTRACT Crosstalk with Timing Windows does not work correctly
: M1 k0 j9 x$ F# L955749  ALLEGRO_EDITOR MANUFACT         show element Info shows symbol dimensions on incorrect subclass
( P1 H' y$ j8 E% o) C. d! F% R955912  ALLEGRO_EDITOR OTHER            Shapes with voids that are exported to PDF have gray filled area over the void
956129  CONCEPT_HDL    INFRA            DEHDL uprev hierachical design from 16.2 to 16.5 packaging failure.
956373  ALLEGRO_EDITOR NC               drawing name doesn't display in the log file
2 C1 s% P  s6 Z, K2 B' {+ `956393  CAPTURE        PROJECT_MANAGER  "GENERAL" and "TYPE" tabs are missing from "Properties" dialogue box.
956448  PSPICE         MODELEDITOR      Can not generate a DEHDL symbol from Model Editor, because no Capture license found
956456  CAPTURE        NETLIST_OTHER    OrTelesis netlist not transferring user properties defined under combined
! b8 Z# p- A4 K956489  ALLEGRO_EDITOR MANUFACT         dimensions lost when symbol with diemnsions attached to symbol origin placed on board
956603  CONCEPT_HDL    OTHER            Part Manager "has stopped working" after changing a component
956751  ALLEGRO_EDITOR ARTWORK          Import Gerber command does not work correctly
$ |4 R. P. B' A, e, |2 p3 W956847  PCB_LIBRARIAN  METADATA         PDV - Partdeveloper symbol to function linkage broken/changed in 16.5
956987  CAPTURE        OTHER            Find from "Search toolbar" doesn't gives complete results
956996  CONCEPT_HDL    INFRA            Correction to ERROR(SPCODD-7): Following Primitive instance causes CM to empty
; n" ~% e! d. c) P" t* ]* o957009  CAPTURE        NETLIST_OTHER    Problem getting database property in Mentor PADS PCB netlist
8 O" T' b3 |( [, c957137  APD            DXF_IF           DXF out  command dose not work correctly.
957167  APD            GRAPHICS         Highlighting for Static shape with display_nohilitefont environment variable.
957232  SIG_INTEGRITY  OTHER            Allegro crash during Model Assignment.
9 S7 h3 m+ p% L' K2 {$ u) C+ {957267  CONCEPT_HDL    INFRA            Packager Error after Import Design
957866  SIP_LAYOUT     DATABASE         Cavity outline is not getting deleted from symbol file
958010  ALLEGRO_EDITOR REPORTS          Wants the ability to extract "Batch"  reports from Partition ".dpf" files.
* w/ N" K8 ^, D: t2 P& j; Z$ s8 m958252  ALLEGRO_EDITOR TESTPREP         Resequence testprep with the option - Delete probes too close crashes the design
958253  ALLEGRO_EDITOR REPORTS          Shape did not have thermal relief connected to pin but unrouted nets still shows zero.
958433  ALLEGRO_EDITOR DRC_CONSTR       False embedded component DRCs
, r2 _- D4 d+ y* A958753  ALLEGRO_EDITOR SHAPE            Dynamic shape is getting corrupted in 16.5
959011  ALLEGRO_EDITOR OTHER            copy problem of via and cline
959101  ALLEGRO_EDITOR EXTRACT          Using extracta with excluding Thermal reliefs
% L# f# t1 b1 f9 }" D: _* I959253  CONCEPT_HDL    INFRA            Design will not open
+ W3 j  R: S0 ?' t' N7 y959299  APD            MODULES          Getting ERROR(SPMHDB-279) when trying to update modules placed on the Top side
959884  CONCEPT_HDL    INFRA            Design Uprev/concept2cm crashes with Application Error/Out of Memory Error.
- y* f) {  e4 c959909  ALLEGRO_EDITOR SCHEM_FTB        Site level propflow.txt file is ignored property is transferred
: r* O8 i6 _! B- O7 o. z960067  SIP_LAYOUT     PLATING_BAR      Creation of plating bar removes "NODRC_ETCH_OUTSIDE_KEEPIN" property from the clines.
/ d: J  `. b# V5 _* p+ c960126  SIG_EXPLORER   EXTRACTTOP       Allegro PCB SI license is used automatically at Topology Extraction of Allegro Physical Viewer.
960143  SIG_INTEGRITY  GEOMETRY_EXTRACT Running simulation in Bus sim happened crash while enable Coulpled Via model to S parameter
961349  CONCEPT_HDL    HDLDIRECT        Motorola designs have broken connectivity compared to 16.3
& v0 N0 c8 C, O9 J# O' I8 _961816  ALLEGRO_EDITOR INTERFACES       Normal Export > DXF fails and offsets  the pins of the BGA symbol
  ?+ U4 L/ F* U6 _$ G$ ?1 d0 ~" e; j962519  SIP_LAYOUT     WIREBOND         Align option doesn't work for wb_tackpoint fingers

nbhand

s013，感谢楼主分享。

pmp_mcu

多谢分享。。。。。。。。。。。。。。。

bazhonglei

顶！！！！！谢谢分享！

fangqwas

谢谢分享

ZXCLH

15没装成功过,但还是谢谢你...

cotterie

非常感谢楼主yulizi 的无私奉献，有了你这个论坛充满了生机和希望。

koncc

感謝分享{:soso_e100:}

reval

都更新些什么呢？？

luluman

大神啊，顶
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john22ppo

# K" ]- n+ D/ k9 A感謝分享

interrupt

说什么好呢

suiwinder

楼主好人啊.
太感谢了.
现在这cadence也太差了把

adolfchen

感謝分享{:soso_e179:}

mengshang

太感谢您了