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Table of Contents
- z; x- F5 e) n& m2 L5 ]0 j5 CAudience ............................................................................................. iii+ R" y$ i0 u2 @' r
Related Documents ............................................................................. iii
- Z2 s0 h& D- F$ g, O. gConventions ........................................................................................ iv
1 Z3 B, M7 g$ p7 ?! u* KObtaining Customer Support .............................................................. vi% a! w/ w$ i# H
Other Sources of Information ............................................................ vii
' c) f) M7 X9 ^$ |- VRevision History ............................................................................... viii
- d+ k! ?$ v9 f1 q3 m) @; D4 tChapter 1 - Overview of Models ..................................................................... 1-1
7 s- J# H4 E7 Y& Y2 IUsing Models to Define Netlist Elements .............................................. 1-2
7 T' D! X, a3 k8 {/ RSupported Models for Specific Simulators ....................................... 1-2$ L( B0 C# B. n! B
Selecting Models .............................................................................. 1-3
# {1 `- ~4 l: }" O5 r$ vExample ............................................................................................ 1-3
1 E0 ~! L- F7 h; J; I( L+ x6 O+ }Chapter 2 - Using Passive Device Models....................................................... 2-1
- u0 n' z+ ^' G- \; O& h" E2 xResistor Device Model and Equations .................................................... 2-2
8 u2 u) E* p6 | hWire RC Model ................................................................................. 2-22 I' Q0 }; B4 p; A, U
Resistor Model Equations ................................................................. 2-5' U. n: X8 p& D% ] Z5 V
Capacitor Device Model and Equations ............................................... 2-10
, m. q# k) f* H- _' }8 O; k3 K: ZCapacitance Model ......................................................................... 2-103 g1 C* O; `( \& a. I
Capacitor Device Equations ........................................................... 2-11
' D2 g* O: f% D. `Inductor Device Model and Equations ................................................. 2-14; h: p4 l' M! {; f* j/ f2 z% V
Inductor Core Models ..................................................................... 2-15
% D$ z f7 Y, ^Magnetic Core Element Outputs .................................................... 2-18
: \" l ~7 r- x, aInductor Device Equations ............................................................. 2-19/ }9 R; a$ }" R4 |( |6 m7 i9 C) T
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21* q' g, n6 m/ K/ G+ ^' x
Power Sources ....................................................................................... 2-30* i0 B2 T6 N' c) k" t% y7 z2 j
Independent Sources ....................................................................... 2-30
( V: q( l, ?# R0 C iControlled Sources .......................................................................... 2-33: p3 d& u* _+ w4 \ v( k
Chapter 3 - Using Diodes ................................................................................. 3-1+ \' j( x5 f2 v' A4 b, W$ K# D
Diode Types ............................................................................................ 3-2
3 n$ ^4 ?, \) `3 g1 \' ~Using Diode Model Statements .............................................................. 3-3& G; G+ x6 z W' m ^
Setting Control Options .................................................................... 3-34 n8 w, {8 l: a0 w! W
Specifying Junction Diode Models ......................................................... 3-57 Z5 I+ I8 R5 [* h$ E
Using the Junction Model Statement ................................................ 3-6, Q( C" k* N- i( G
Using Junction Model Parameters .................................................... 3-7
9 }' S( d" `8 ]% K2 I/ jGeometric Scaling for Diode Models ............................................. 3-13. v0 d5 J+ c8 ^, V( K" U- x8 R6 e
Defining Diode Models ................................................................... 3-15
6 T) j" G& l$ ?8 L! `/ cDetermining Temperature Effects on Junction Diodes ................... 3-18$ p0 ]% D2 _8 m
Using Junction Diode Equations ........................................................... 3-21
( ?' I% C' }, R5 ZUsing Junction DC Equations ......................................................... 3-22
/ F" C& c5 M* N$ C5 G3 gUsing Diode Capacitance Equations ............................................... 3-25/ h- T. e0 _' }, X1 N3 G/ @
Using Noise Equations .................................................................... 3-27 x: z! K) e( r: w
Temperature Compensation Equations ........................................... 3-28/ \$ [: R& ~4 j5 d4 f
Using the Junction Cap Model .............................................................. 3-32
" | {9 Z% h* Y5 Z/ U M* p" USetting Juncap Model Parameters ................................................... 3-333 F9 l/ C0 S+ Y6 _! M, D- g: ^
Theory ............................................................................................. 3-338 u# n0 P- A: c% s* Y. S$ m! h$ g
JUNCAP Model Equations ............................................................. 3-38) Y! n- G1 Q7 A. O
Using the Fowler-Nordheim Diode ...................................................... 3-466 [6 T: n3 p# G7 T& T& p& G
Converting National Semiconductor Models ........................................ 3-48) U, S; S$ j9 I) x; _! p. @
Chapter 4 - Using BJT Models ........................................................................ 4-1 q& o1 E0 l: R) I$ d2 o8 Z9 u7 W+ q
Using BJT Models .................................................................................. 4-2
0 x! U! z$ h5 w3 S' \Selecting Models ............................................................................... 4-2) k. Q: {1 j; I, P0 t
BJT Model Statement ............................................................................. 4-4! U/ Y$ L- f2 q6 o6 }) t
Using BJT Basic Model Parameters ................................................. 4-5
) O1 X* u! f+ |( I# N: k/ z, t aHandling BJT Model Temperature Effects ..................................... 4-15
7 q& g+ O; C' j' d+ LBJT Device Equivalent Circuits ............................................................ 4-21
# |2 \- `$ Q" M ?, U- TScaling ............................................................................................. 4-219 z0 r8 U& L& N) P( p E
Understanding the BJT Current Convention ................................... 4-21/ o" l3 Y) G2 I+ C0 d0 v
Using BJT Equivalent Circuits ....................................................... 4-22& Y7 Q4 b+ `. o E& L; \
BJT Model Equations (NPN and PNP) ................................................. 4-30
6 q3 r* O. X+ h4 `, m- W" IUnderstanding Transistor Geometry in Substrate Diodes .............. 4-302 P3 B3 J$ k% o( E
Using DC Model Equations ............................................................ 4-32
( Z# p1 u/ C( H6 L8 wUsing Substrate Current Equations ................................................. 4-33! _3 J6 ?5 ]( u. H' I- E
Using Base Charge Equations ......................................................... 4-34
' } R: B& @3 t% ^9 b9 P2 mUsing Variable Base Resistance Equations .................................... 4-35
. u8 i% N( L0 @/ |$ B" f" cUsing BJT Capacitance Equations ........................................................ 4-36
# O/ n6 Q. U+ W! e( s/ S! vUsing Base-Emitter Capacitance Equations ................................... 4-367 u* @7 \& s8 h* O& F
Determining Base Collector Capacitance ....................................... 4-38
& S) A5 w. C0 h; c# K. c3 G7 l; \Using Substrate Capacitance ........................................................... 4-40+ u- F$ d5 F, {3 Z
Defining BJT Noise Equations ............................................................. 4-42+ Q4 F2 E8 o* S( O) B
BJT Temperature Compensation Equations ......................................... 4-44
2 O0 u3 L) N5 u; d. J! CUsing Energy Gap Temperature Equations .................................... 4-44$ ?1 T9 n$ ^' N+ \# T
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
6 U. v. Y# A7 x" u- j( [4 jUsing Saturation and Temperature Equations, TLEV=1 ................ 4-46
l# I) f5 S6 }2 RUsing Saturation Temperature Equations, TLEV=3 ....................... 4-47
9 c) z" ?4 W& M) M/ Q( HUsing Capacitance Temperature Equations .................................... 4-49) M2 Q1 z+ a& }) \4 b
Parasitic Resistor Temperature Equations ...................................... 4-51& N( w! d0 X4 z7 {% x9 L
Using BJT Level=2 Temperature Equations .................................. 4-52* X( X8 Y4 y7 ~6 D
BJT Quasi-Saturation Model ................................................................ 4-53
; F( H5 a( K4 h# r' [# CUsing Epitaxial Current Source Iepi ............................................... 4-553 c$ O* j J- M" g8 z- u$ L
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55- L: Q3 q9 \" e8 m- _& d& v% C' ?
Converting National Semiconductor Models ........................................ 4-58
0 Y/ A+ f2 ~# CVBIC Bipolar Transistor Model ........................................................... 4-60- r+ t) {9 G3 ] b
Understanding the History of VBIC ............................................... 4-60
$ r6 p5 B: _6 L- p0 o8 JVBIC Parameters ............................................................................ 4-61
- u2 W3 b6 f8 G4 C/ rNoise Analysis ................................................................................ 4-62! A. |% W9 s) _ m1 R5 c9 _
Level 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71% U, j' [- @& }2 v. U+ E
Level 6 Element Syntax .................................................................. 4-71+ X6 l5 R1 ?# [! \% g" v
Level 6 Model Parameters .............................................................. 4-72
! N5 N, U8 K4 u4 i' B' JLevel 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-789 _7 S; |$ o' e$ c3 U
Notes ............................................................................................... 4-79, @4 N; Y* ` m: j8 B
Level 6 Model Parameters (504) ..................................................... 4-808 n7 W+ M: B$ @" K! `9 T. Y0 n
Level 8 HiCUM Model ......................................................................... 4-942 D1 I( x: | O9 `
What is the HiCUM Model? ........................................................... 4-94
0 V6 G9 e9 X4 v3 [# PHiCUM Model Advantages ............................................................ 4-946 l- u6 e7 P; x7 J; i4 [' c
Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-96
! L6 N) Q, m8 U4 Q I# U, B3 pModel Implementation .................................................................... 4-96
& n! @- H T# \. f0 G% ^5 p+ t$ fInternal Transistors ......................................................................... 4-97
D6 Q# o ~8 F+ GLevel 9 VBIC99 Model ...................................................................... 4-110. R8 C+ Z7 m6 s3 \8 c3 ?8 c2 q7 ]) D
Element Syntax of BJT Level 9 .................................................... 4-110
) w# u/ l! t- _7 z0 e& L: gEffects of VBIC99 ........................................................................ 4-112, f* p: B1 x- g! D5 u
Model Implementation .................................................................. 4-1128 P& o" s1 G0 y
Example ........................................................................................ 4-119
7 v* @ C# V0 P1 }! |. E2 O% |/ hVBIC99 Notes for HSPICE Users ................................................ 4-123
; P4 o8 P Z4 O* p+ vLevel 10 Phillips MODELLA Bipolar Model .................................... 4-124
3 r$ t1 y% h; A, r; V- A6 ^8 BModel Parameters ......................................................................... 4-124 j0 u- @7 n3 `$ z j9 q7 O
Equivalent Circuits ........................................................................ 4-129+ u7 g' r# Z' m1 ^
DC Operating Point Output .......................................................... 4-131" v2 ]% I2 V7 X! v1 A
Model Equations ........................................................................... 4-132! U8 E0 L) [9 J, i$ _7 }9 R
Temperature Dependence of the Parameters ................................ 4-142
; v% ?! x# P* S9 L1 V% q3 X& g% _Level 11 UCSD HBT Model .............................................................. 4-1468 v4 k, R d: m% Y
Using the UCSD HBT Model ....................................................... 4-146
" q O3 Q; p1 Q) gDescription of Parameters ............................................................. 4-147
B. g [+ q! Y+ n4 K+ i4 q4 [5 vModel Equations ........................................................................... 4-152
$ z/ {7 [; R! r' P! V; {0 C& k* tEquivalent Circuit ......................................................................... 4-163
% V W4 W2 A$ `! G, dExample Avant! True-Hspice Model Statement ........................... 4-165
- ~2 s( L% c; [6 O b! a$ ^* ]Chapter 5 - Using JFET and MESFET Models............................................. 5-1& @* _- V' ?* [+ K" t( t
Understanding JFETs .............................................................................. 5-2
" q! P% o7 W1 n4 Z7 Q! E, SSpecifying a Model ................................................................................. 5-3
, p) s% |: c& c5 l1 [+ uUnderstanding the Capacitor Model ....................................................... 5-5
& ?, F3 F$ ~2 G8 Q E/ v( J% HModel Applications ........................................................................... 5-5" K% V" C! C( u6 L0 E
Control Options ................................................................................. 5-6" z/ K% r1 b( m
JFET and MESFET Equivalent Circuits ................................................. 5-7
2 X: Z* Y/ w% D9 d) l( v" gScaling ............................................................................................... 5-7
# }" v1 G6 L8 v h7 AUnderstanding JFET Current Convention ........................................ 5-7, m/ G; Q$ c7 o- t3 r! z( L) d
JFET Equivalent Circuits .................................................................. 5-8
, v6 H9 g- Z2 |JFET and MESFET Model Statements ................................................. 5-13. J. W2 r3 K+ X& t" }0 X
JFET and MESFET Model Parameters ........................................... 5-135 J1 B: x( g+ V
Gate Diode DC Parameters ............................................................. 5-15
4 }6 ?7 u/ C: P; OJFET and MESFET Capacitances ................................................... 5-259 j6 |- w# x% _2 z5 m, x7 Q7 K* ~
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
9 a/ s; e$ ~; b) F! t; OJFET and MESFET DC Equations ................................................. 5-31
: q W( e* i7 e; x- FJFET and MESFET Noise Models ....................................................... 5-35$ q6 X, [. [" u1 K+ f# q$ Z
Noise Parameters ........................................................................... 5-35
/ X8 |' @/ K! y! o* E6 P: INoise Equations .............................................................................. 5-35* T7 g7 v3 w2 H' z' C
Noise Summary Printout Definitions .............................................. 5-360 J/ Q# h5 L) R
JFET and MESFET Temperature Equations ........................................ 5-37
+ W* W" d$ G; cTemperature Compensation Equations ........................................... 5-401 S- j) r+ M* G) ]/ d& L
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