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[Hspice仿真] True-Hspice Device模型参考手册

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发表于 2008-3-25 17:14 | 只看该作者 回帖奖励 |正序浏览 |阅读模式

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Table of Contents
* N7 x7 R# F6 e! oAudience ............................................................................................. iii$ _: \4 O+ D: n6 d
Related Documents ............................................................................. iii
! E& w  v" l% ?: PConventions ........................................................................................ iv2 H' T1 \/ {( B# |! w8 Q
Obtaining Customer Support .............................................................. vi
+ A8 [4 w% J: w2 E$ V( y# d; I* rOther Sources of Information ............................................................ vii( X. q- G! z4 K/ ~  P4 j1 |. D
Revision History ............................................................................... viii- |( t& W! h3 o
Chapter 1 - Overview of Models ..................................................................... 1-1
: @. V/ H7 }% z8 @, Q  [2 {Using Models to Define Netlist Elements .............................................. 1-2
4 Z7 D$ l5 V% E6 ?( SSupported Models for Specific Simulators ....................................... 1-2  i0 w8 q9 p+ r# C9 \  w! f
Selecting Models .............................................................................. 1-3
8 D: Q% h1 \9 T: U$ n( O) \2 MExample ............................................................................................ 1-3
! K6 v& W+ Y1 m" ]Chapter 2 - Using Passive Device Models....................................................... 2-1. @' D! E; O: i. @9 C
Resistor Device Model and Equations .................................................... 2-2
+ w! v9 W7 [' p& ]1 u* YWire RC Model ................................................................................. 2-2
0 ]; u% l7 B, s$ a$ p$ aResistor Model Equations ................................................................. 2-5: _" v! U5 b& c+ h) e2 Z* w" y& z
Capacitor Device Model and Equations ............................................... 2-100 t. r: D, X, r
Capacitance Model ......................................................................... 2-10
% h1 [* c  y( P# V/ iCapacitor Device Equations ........................................................... 2-11
! I; J9 k6 V+ \Inductor Device Model and Equations ................................................. 2-14
$ m2 h& F6 l; d$ O: j/ jInductor Core Models ..................................................................... 2-15" ?, O* V0 B* `) O( l& M  t
Magnetic Core Element Outputs .................................................... 2-18* U1 i. a" E: I  N
Inductor Device Equations ............................................................. 2-191 I; l# W0 }+ z1 o/ `0 [
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21& Y& ^5 _9 m3 E. F( I4 j9 ?( z' h  s
Power Sources ....................................................................................... 2-30
9 O+ W8 ]; W+ u% ~+ H( d' f: Y; M3 ~Independent Sources ....................................................................... 2-30
9 `+ M3 o2 r) x; }2 V3 |Controlled Sources .......................................................................... 2-338 ?4 C  A" y% n! l7 u  R4 @( Y
Chapter 3 - Using Diodes ................................................................................. 3-1# C: g" p) f: N" W3 @
Diode Types ............................................................................................ 3-2
8 ?3 ~' a4 E. Y/ y4 gUsing Diode Model Statements .............................................................. 3-3& I) O1 u& f) \  S
Setting Control Options .................................................................... 3-3) _' }. S" t5 f( F. U# b8 L; p
Specifying Junction Diode Models ......................................................... 3-59 {: g5 x: |; E/ k+ L6 _: m- `- ~
Using the Junction Model Statement ................................................ 3-6# n& o3 {* L/ F0 _1 E0 V2 Y( i
Using Junction Model Parameters .................................................... 3-7( L& ]8 k! p# R& M/ N4 ~
Geometric Scaling for Diode Models ............................................. 3-13; l; a! ?/ q9 F" J- H
Defining Diode Models ................................................................... 3-15  j2 T9 g( d( m- X1 \0 e0 F
Determining Temperature Effects on Junction Diodes ................... 3-18& y: [- a, |8 j# ^7 [9 r
Using Junction Diode Equations ........................................................... 3-21- S- H' g2 ~* a: P& N' P: A9 k" U0 e
Using Junction DC Equations ......................................................... 3-224 {2 H7 k8 ~0 g2 C1 \7 r
Using Diode Capacitance Equations ............................................... 3-25; @  B! ~! h3 T# f# c5 B% T
Using Noise Equations .................................................................... 3-27
1 @# c9 K: b# u7 j+ iTemperature Compensation Equations ........................................... 3-28- N& X& _' f  M' {) U7 Z" s8 o* T
Using the Junction Cap Model .............................................................. 3-32
5 {5 N1 P) ~, ?$ [! @& _, E3 q/ ?Setting Juncap Model Parameters ................................................... 3-33- S! _8 t# Y/ A3 b( t* m# U: h
Theory ............................................................................................. 3-339 @1 w4 G! J; U* v9 |# V2 J( c
JUNCAP Model Equations ............................................................. 3-38, H9 w% V0 {4 {( g3 o, ^
Using the Fowler-Nordheim Diode ...................................................... 3-46
0 x! w5 k. n4 q+ M& s& tConverting National Semiconductor Models ........................................ 3-48
( Y4 X8 W2 g* N. r' z3 p+ M& ~3 _. aChapter 4 - Using BJT Models ........................................................................ 4-12 l5 l' H& G8 M3 N! \
Using BJT Models .................................................................................. 4-2
$ a0 H' J( D2 f- B/ P& x' fSelecting Models ............................................................................... 4-2
$ T% Q+ I2 t9 l8 }  \/ j; M2 u6 y4 bBJT Model Statement ............................................................................. 4-4$ x; X; n  h9 _' _- U  I
Using BJT Basic Model Parameters ................................................. 4-5: N4 N! N! S3 X6 `9 r: W
Handling BJT Model Temperature Effects ..................................... 4-15
; _4 M% M2 j) q, HBJT Device Equivalent Circuits ............................................................ 4-21
% I2 S& a" i6 QScaling ............................................................................................. 4-21
) e; N: @8 `2 g. H7 }+ lUnderstanding the BJT Current Convention ................................... 4-21
! T0 J3 Z# B, G& `# b$ v8 G6 w3 D. uUsing BJT Equivalent Circuits ....................................................... 4-22
' I' V8 V  r$ g' @5 mBJT Model Equations (NPN and PNP) ................................................. 4-30
7 n! }& C1 o+ X% A- ]  R+ EUnderstanding Transistor Geometry in Substrate Diodes .............. 4-30
! A: Y. \  w1 R" L* n7 HUsing DC Model Equations ............................................................ 4-322 U# y2 O8 n& P8 J$ j- A* u
Using Substrate Current Equations ................................................. 4-33
1 n$ L1 S9 p  S( t8 {' w5 A1 Z) OUsing Base Charge Equations ......................................................... 4-344 H4 {' X4 f, _1 V8 J6 b7 ]: |; D
Using Variable Base Resistance Equations .................................... 4-35/ r/ J/ z( C# M3 p
Using BJT Capacitance Equations ........................................................ 4-36/ q& d5 N* |! I3 l: t3 W. e
Using Base-Emitter Capacitance Equations ................................... 4-36
- ]0 I/ p5 K3 B1 P! TDetermining Base Collector Capacitance ....................................... 4-38' S  {# ?8 h7 F6 S: j0 L5 Q3 J. L. Y
Using Substrate Capacitance ........................................................... 4-40
. q( L; Q8 G/ c# O! uDefining BJT Noise Equations ............................................................. 4-42
! E. W6 P" ?. s2 r$ ]' J0 BBJT Temperature Compensation Equations ......................................... 4-44
' @' i- @+ a2 O; R. `" x' zUsing Energy Gap Temperature Equations .................................... 4-44: B  `+ v1 n' `  ^! D! c+ e8 L
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
4 Q7 ], ^8 z! gUsing Saturation and Temperature Equations, TLEV=1 ................ 4-46: s; u8 o4 J" K" I
Using Saturation Temperature Equations, TLEV=3 ....................... 4-47. U' S- z! j" }, D  z# S& F
Using Capacitance Temperature Equations .................................... 4-49
4 B3 z# ?% B: v: p( VParasitic Resistor Temperature Equations ...................................... 4-51
4 s# w/ T6 d6 s- B( i( _Using BJT Level=2 Temperature Equations .................................. 4-52; J3 ?! R/ v" a
BJT Quasi-Saturation Model ................................................................ 4-539 Z, S8 O( N3 J/ J$ n
Using Epitaxial Current Source Iepi ............................................... 4-55
3 D2 a7 v2 ^' x( ]Epitaxial Charge Storage Elements Ci and Cx ............................... 4-557 v( u: u2 P( Z) Y
Converting National Semiconductor Models ........................................ 4-58
/ z- g# h! H7 q( T6 ?  lVBIC Bipolar Transistor Model ........................................................... 4-60
) r3 R2 r" t; W/ ^7 O1 k0 NUnderstanding the History of VBIC ............................................... 4-60
' _7 j% C! Z1 G, p* iVBIC Parameters ............................................................................ 4-61
1 G* i% ?- |7 d4 b6 g/ d: i7 lNoise Analysis ................................................................................ 4-628 e' z" K5 a. @( H
Level 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
: l) _1 p; E5 ?) O/ C0 Q+ k& _Level 6 Element Syntax .................................................................. 4-71
5 N! ~: J) p( d- d5 H3 ?Level 6 Model Parameters .............................................................. 4-728 H9 q( l  @# j8 S
Level 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
6 R/ {, P4 L9 [& m/ x* R0 WNotes ............................................................................................... 4-79
  S9 m) r9 N( }" `Level 6 Model Parameters (504) ..................................................... 4-80: a9 ]7 M" M3 H7 K
Level 8 HiCUM Model ......................................................................... 4-943 h5 ?% T" r# Y0 n/ M
What is the HiCUM Model? ........................................................... 4-94
+ w. g' U3 S8 |5 a0 NHiCUM Model Advantages ............................................................ 4-94
0 A) d4 [! z6 D+ }Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-968 ~+ |5 _  e; r; w( D7 X5 q+ d
Model Implementation .................................................................... 4-96$ c1 u4 J  K  C
Internal Transistors ......................................................................... 4-97
$ s1 N/ x) _6 v) _! GLevel 9 VBIC99 Model ...................................................................... 4-1105 S/ x( w/ c1 {* v% v. [0 p/ k
Element Syntax of BJT Level 9 .................................................... 4-1105 I! {' a# I& B
Effects of VBIC99 ........................................................................ 4-112
% h' d6 X/ r2 K" uModel Implementation .................................................................. 4-112/ A- t& `' W/ {
Example ........................................................................................ 4-119" K8 r4 j* z& a
VBIC99 Notes for HSPICE Users ................................................ 4-123
: V. H. M4 \& v3 mLevel 10 Phillips MODELLA Bipolar Model .................................... 4-124
" f5 ]# |) p% [) g! x, b3 fModel Parameters ......................................................................... 4-124
& N- [5 a" c3 D4 [- @; S8 GEquivalent Circuits ........................................................................ 4-129' ^# i& J1 @5 e& @; @# [9 C# B
DC Operating Point Output .......................................................... 4-131% @% B; r2 S7 ]6 L! M/ X
Model Equations ........................................................................... 4-132) f: I! Y2 y1 ~/ K0 C
Temperature Dependence of the Parameters ................................ 4-142( A' c! ]7 r5 Z8 _& }1 M
Level 11 UCSD HBT Model .............................................................. 4-1463 ?+ f: T( L: r% w  T! ?  f  g- }/ @
Using the UCSD HBT Model ....................................................... 4-146) D, j6 l) Z4 @9 }
Description of Parameters ............................................................. 4-147
; o: w, S! X; Y, K" y0 ?Model Equations ........................................................................... 4-152
9 d8 j! j* |% u, Q- YEquivalent Circuit ......................................................................... 4-1636 ?: C; }7 r& O3 u4 r
Example Avant! True-Hspice Model Statement ........................... 4-165
0 x, u$ @. G! f1 A. b( Z) bChapter 5 - Using JFET and MESFET Models............................................. 5-1/ s) w* m1 C6 s9 U; e4 w
Understanding JFETs .............................................................................. 5-29 J, }9 h5 g' y$ W3 `% e% r
Specifying a Model ................................................................................. 5-3, T3 t  P9 v; [  m, @3 G
Understanding the Capacitor Model ....................................................... 5-59 P/ v% s, A/ g  U9 Q
Model Applications ........................................................................... 5-5- |' c9 r# |5 |# s5 z% k- {
Control Options ................................................................................. 5-6( R8 w1 d3 L2 M4 V+ `0 `
JFET and MESFET Equivalent Circuits ................................................. 5-7' f- q5 l: Y0 _" t9 |$ O( h" w
Scaling ............................................................................................... 5-7
9 Z0 G. L: s' F2 L& h% LUnderstanding JFET Current Convention ........................................ 5-7
& `) B# o6 [4 y, q/ bJFET Equivalent Circuits .................................................................. 5-8
) a' a- d3 U2 h* ?# DJFET and MESFET Model Statements ................................................. 5-135 E5 }% a( ?- v' B1 P3 n
JFET and MESFET Model Parameters ........................................... 5-13
) ^+ q( S5 |' T7 _& iGate Diode DC Parameters ............................................................. 5-15' n, x8 E* T8 N& @1 d
JFET and MESFET Capacitances ................................................... 5-25/ T- e5 a7 c; u4 o) C& {  G+ g
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29  y# ?3 Z, {& F: Y
JFET and MESFET DC Equations ................................................. 5-31
7 l5 [3 z5 O: S0 Z7 q) yJFET and MESFET Noise Models ....................................................... 5-35
8 p% q, E5 d& ^1 ~6 R4 {2 hNoise Parameters ........................................................................... 5-35" G' F6 n4 ]( I' w8 t7 Q' ]6 R
Noise Equations .............................................................................. 5-35
# x1 h  U7 a7 `; tNoise Summary Printout Definitions .............................................. 5-36
# f) x; h# {1 h8 iJFET and MESFET Temperature Equations ........................................ 5-37" \0 _1 Y- m9 `6 N
Temperature Compensation Equations ........................................... 5-40
, `; W4 ~& g% t1 U。。。。。。。。。。。
' v" U4 L4 X8 |9 G# |' ^$ S: E# J( T
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xiexie lou zhu

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支持,頂一個

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发表于 2018-4-8 10:59 | 只看该作者
谢谢分享

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谢谢~

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发表于 2015-4-18 17:03 | 只看该作者
谢谢啊!

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谢谢

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先下了,谢谢!努力学习

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发表于 2012-8-8 16:18 | 只看该作者
thanks a lot ,very good materials

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谢谢~

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谢谢,学习中
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