|
|
EDA365欢迎您！
您需要 登录 才可以下载或查看，没有帐号？注册
x
Table of Contents8 n5 c4 [% S% b7 l5 x. [* z* d9 l
Audience ............................................................................................. iii
" V4 \( a, E2 w: k9 \0 r0 J, {. LRelated Documents ............................................................................. iii9 y* j4 [1 N8 Q' y! T
Conventions ........................................................................................ iv+ u+ |$ p4 P. K; b( `
Obtaining Customer Support .............................................................. vi
9 q2 T7 @$ U1 O" COther Sources of Information ............................................................ vii% J9 ^% g5 L% G& o
Revision History ............................................................................... viii
' B6 `: [* X: L5 R NChapter 1 - Overview of Models ..................................................................... 1-1
3 I! m$ V6 K/ W% U+ _! L `. UUsing Models to Define Netlist Elements .............................................. 1-2, v' ^, p2 X* k/ T1 U! H0 ?
Supported Models for Specific Simulators ....................................... 1-2
/ w1 p7 _7 E$ o" n) ~" X1 o; ~Selecting Models .............................................................................. 1-3, ~( l' B4 n+ \, I- ~- `
Example ............................................................................................ 1-3$ B4 P8 ?/ l' I6 J& w
Chapter 2 - Using Passive Device Models....................................................... 2-1! a1 J$ G% O ]/ f
Resistor Device Model and Equations .................................................... 2-2
6 a3 I/ z( u$ Q: s. y jWire RC Model ................................................................................. 2-20 U/ X, ?: F* ?7 P' Q @# h' \
Resistor Model Equations ................................................................. 2-5
1 A# K/ b" m( O ^, ?' H9 RCapacitor Device Model and Equations ............................................... 2-108 |/ \# [9 V. O* D4 N
Capacitance Model ......................................................................... 2-10' N" j2 U& f4 u3 J9 x( z1 b
Capacitor Device Equations ........................................................... 2-119 ]: R$ d" d! u3 A/ e% g; A5 S
Inductor Device Model and Equations ................................................. 2-14- r, ~* l- r E
Inductor Core Models ..................................................................... 2-15
: b; L, W1 r/ }; tMagnetic Core Element Outputs .................................................... 2-18
! r( m7 _1 M; ^4 ]3 D9 G2 rInductor Device Equations ............................................................. 2-19
" I) f7 ?8 I9 g8 F) O) F6 k2 vJiles-Atherton Ferromagnetic Core Model ..................................... 2-21+ H7 }2 ^3 Y( j! R1 n
Power Sources ....................................................................................... 2-30
2 {/ M2 C6 D! [7 r! @3 n1 VIndependent Sources ....................................................................... 2-30, }2 W) y) z9 P: t7 I5 d+ F8 E
Controlled Sources .......................................................................... 2-33
6 Q, n% F# |* t7 cChapter 3 - Using Diodes ................................................................................. 3-1
$ p$ n5 I) s2 V% Z1 `6 uDiode Types ............................................................................................ 3-2. O/ R' s4 E0 G G S
Using Diode Model Statements .............................................................. 3-3
# _' C% l: C4 \. H" }9 f2 ]Setting Control Options .................................................................... 3-3
7 `* ^# R: o8 n3 M* v3 }# xSpecifying Junction Diode Models ......................................................... 3-5
1 x1 L& c* W# v+ u% UUsing the Junction Model Statement ................................................ 3-6) a, Q% ~& E! h1 H7 N
Using Junction Model Parameters .................................................... 3-7& H/ }1 l N% i$ g$ }3 L& d8 Y9 B
Geometric Scaling for Diode Models ............................................. 3-132 o& L* N) F! j% J: A/ A# P
Defining Diode Models ................................................................... 3-15( L% b: t) e$ m8 e. o5 w
Determining Temperature Effects on Junction Diodes ................... 3-18
! B7 o6 \/ b' F3 Q" p7 ~# QUsing Junction Diode Equations ........................................................... 3-21$ y0 O4 U4 y7 J4 P* ]
Using Junction DC Equations ......................................................... 3-222 q/ O, U+ L# Z% N( J
Using Diode Capacitance Equations ............................................... 3-25$ [5 Q" S! w; [, Z8 t# e2 Z; r
Using Noise Equations .................................................................... 3-27. J' C; y. m- l/ A, c' @
Temperature Compensation Equations ........................................... 3-28! s1 R3 @* U0 A- \0 h6 Q
Using the Junction Cap Model .............................................................. 3-32
" q I2 R% G9 | ~ \; s; ISetting Juncap Model Parameters ................................................... 3-335 A' ^; m/ K. w6 ?- F5 e
Theory ............................................................................................. 3-33
! @2 b% c: _& G9 G' j+ D! r0 BJUNCAP Model Equations ............................................................. 3-38# {" ]0 T' W7 e% X+ [; q' u
Using the Fowler-Nordheim Diode ...................................................... 3-46
9 v6 J8 ?* {9 [. a) U W3 R5 XConverting National Semiconductor Models ........................................ 3-48
! [+ W8 C, z" }Chapter 4 - Using BJT Models ........................................................................ 4-1# k/ X! U8 g+ f5 `7 ]
Using BJT Models .................................................................................. 4-2
6 T' ]8 w3 ?( g5 x. d& tSelecting Models ............................................................................... 4-2
: T" e9 h, @5 u, h& y/ V) ]BJT Model Statement ............................................................................. 4-41 q# Z, c% M' n) X' U
Using BJT Basic Model Parameters ................................................. 4-57 `% W' g1 L7 t. v9 ]
Handling BJT Model Temperature Effects ..................................... 4-15
0 i5 b* ~1 a$ j& q8 v( H4 LBJT Device Equivalent Circuits ............................................................ 4-21
+ K4 {- J$ P, c! G6 gScaling ............................................................................................. 4-21
T# K( {4 W5 jUnderstanding the BJT Current Convention ................................... 4-21
s7 H( O2 C4 A5 GUsing BJT Equivalent Circuits ....................................................... 4-22$ f6 W& @' k: p
BJT Model Equations (NPN and PNP) ................................................. 4-30) e+ X$ m. e8 ?; f) c! q5 b8 }
Understanding Transistor Geometry in Substrate Diodes .............. 4-30- W; c5 N6 ?% F9 `- v* J; H1 s
Using DC Model Equations ............................................................ 4-32
. B4 X5 T# B2 D! CUsing Substrate Current Equations ................................................. 4-33
* x4 I$ q1 e" ~' j$ IUsing Base Charge Equations ......................................................... 4-34
+ r9 G6 g$ D0 a- g WUsing Variable Base Resistance Equations .................................... 4-35
9 a! S4 f# g% T3 \0 ^- c7 FUsing BJT Capacitance Equations ........................................................ 4-36* B* n& d5 [, _
Using Base-Emitter Capacitance Equations ................................... 4-36
6 |4 J3 l8 U8 k$ N4 N) a" l- W; GDetermining Base Collector Capacitance ....................................... 4-38
$ x9 d5 i' |! q6 c2 ^6 U; oUsing Substrate Capacitance ........................................................... 4-409 k% }6 R3 ^* A j
Defining BJT Noise Equations ............................................................. 4-42
$ h: I# \; N" LBJT Temperature Compensation Equations ......................................... 4-447 u v+ \; {3 t+ d" B) w5 u. O% J( V
Using Energy Gap Temperature Equations .................................... 4-445 U) e' \$ q4 G+ }- B
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44/ K# c8 \7 M4 f B$ d
Using Saturation and Temperature Equations, TLEV=1 ................ 4-46
G4 S5 X" e1 K3 ?# z& F2 IUsing Saturation Temperature Equations, TLEV=3 ....................... 4-47
& g# v5 n/ N2 \( c7 @; h i1 u7 PUsing Capacitance Temperature Equations .................................... 4-49
) q" G6 ~, C" A" K0 uParasitic Resistor Temperature Equations ...................................... 4-51. M$ e6 ]8 L1 ]. {6 f4 o; j
Using BJT Level=2 Temperature Equations .................................. 4-52
" t1 K! ]* b( t9 z9 xBJT Quasi-Saturation Model ................................................................ 4-53
5 V9 f( m( ~/ W7 jUsing Epitaxial Current Source Iepi ............................................... 4-55, x4 V! {2 f% h) b g$ }( v
Epitaxial Charge Storage Elements Ci and Cx ............................... 4-55+ c7 u- @* w" n# |! I$ H$ m
Converting National Semiconductor Models ........................................ 4-58
7 I+ }' x% d! H3 t T0 h. KVBIC Bipolar Transistor Model ........................................................... 4-60
G5 m9 R0 {+ n" XUnderstanding the History of VBIC ............................................... 4-60, Z8 s$ ?% q# ?0 y6 S+ i
VBIC Parameters ............................................................................ 4-61
! d6 ~- @" s/ f4 v$ e1 KNoise Analysis ................................................................................ 4-62
8 ?$ ^6 w; Y' yLevel 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
2 b- k8 l- c$ ~Level 6 Element Syntax .................................................................. 4-71
5 m+ d7 H, f* w8 l& ~9 LLevel 6 Model Parameters .............................................................. 4-72
5 |9 ?1 A2 v( F K. z+ tLevel 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
% w4 F {) Q4 x, b. s6 gNotes ............................................................................................... 4-79
8 [9 |7 l' g8 [# xLevel 6 Model Parameters (504) ..................................................... 4-80
' t. p5 [; M* l+ s, ?Level 8 HiCUM Model ......................................................................... 4-94. d* i8 H( O8 o
What is the HiCUM Model? ........................................................... 4-94" ]' e. `* s" W* b
HiCUM Model Advantages ............................................................ 4-94( g. c2 C. ^+ c: B, H
Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-96( O: V7 @/ V0 o
Model Implementation .................................................................... 4-96. y0 l3 c' A0 e# }2 q
Internal Transistors ......................................................................... 4-97
" x# z' E( C/ B9 J& ?& [1 L/ PLevel 9 VBIC99 Model ...................................................................... 4-110
( G: e+ k/ F" U) b& h; dElement Syntax of BJT Level 9 .................................................... 4-110
& }- F' j. n5 ?: ~" z1 Q- [Effects of VBIC99 ........................................................................ 4-112
% i# p. P4 g% k6 k# Z$ YModel Implementation .................................................................. 4-1128 k: P" D! b- B" c
Example ........................................................................................ 4-119
: x9 X, ?$ y2 X2 a: O0 DVBIC99 Notes for HSPICE Users ................................................ 4-1236 {; D s4 ] W
Level 10 Phillips MODELLA Bipolar Model .................................... 4-124; d+ l3 i5 t% r0 O. T- L W- u) [
Model Parameters ......................................................................... 4-124
4 y# R7 X7 U1 G7 M& o( K% ~Equivalent Circuits ........................................................................ 4-129( p7 u8 B# n. J* j D- ?! z
DC Operating Point Output .......................................................... 4-1311 k! J- A% F( u9 Q
Model Equations ........................................................................... 4-1321 N0 t9 Y P3 X5 D
Temperature Dependence of the Parameters ................................ 4-142
) h6 L1 Y0 S" u/ ^, |* X; `Level 11 UCSD HBT Model .............................................................. 4-146" X0 }& @+ C% G8 ~
Using the UCSD HBT Model ....................................................... 4-146
9 \4 U/ n# I0 p0 `+ W7 p. u& SDescription of Parameters ............................................................. 4-147' y0 F& a3 N* m# w# T: g( `
Model Equations ........................................................................... 4-152
9 b: a W7 _0 m5 ?' Y/ R EEquivalent Circuit ......................................................................... 4-163
& U7 J A7 t5 A7 B6 eExample Avant! True-Hspice Model Statement ........................... 4-165, y" C' B% M: G/ C. e% n
Chapter 5 - Using JFET and MESFET Models............................................. 5-19 q$ W- n5 h8 G% m+ ~4 p$ n: `
Understanding JFETs .............................................................................. 5-2
3 `2 S% Z% w0 e2 Z) W, OSpecifying a Model ................................................................................. 5-3
2 [/ a9 n. F1 {, DUnderstanding the Capacitor Model ....................................................... 5-5
2 Q& [. P/ |/ L! p% _Model Applications ........................................................................... 5-5/ l# w' M/ S& F" ~6 K" R
Control Options ................................................................................. 5-6
+ A* }, B/ I9 v2 U' f9 {6 hJFET and MESFET Equivalent Circuits ................................................. 5-7( v, Y- g% e/ g. a
Scaling ............................................................................................... 5-7
5 \1 g8 N. t( e( HUnderstanding JFET Current Convention ........................................ 5-73 w+ v/ K7 }; x4 O
JFET Equivalent Circuits .................................................................. 5-8
& v6 e5 V% C9 G2 v R4 J/ \JFET and MESFET Model Statements ................................................. 5-13) i2 S6 X2 y b2 Y: y8 ~
JFET and MESFET Model Parameters ........................................... 5-13
; ~: e p4 G" J7 r6 a% [! U3 aGate Diode DC Parameters ............................................................. 5-15! C; V# s1 t$ e7 V! |0 o
JFET and MESFET Capacitances ................................................... 5-257 c% q0 u# F2 ?6 k* [7 I/ o9 I
Capacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29+ Z6 D* ~$ }. ^1 ]$ _# Z
JFET and MESFET DC Equations ................................................. 5-31
2 v: L9 ^ r% f; V4 W% E2 BJFET and MESFET Noise Models ....................................................... 5-35' p3 Y4 s. x2 L2 z
Noise Parameters ........................................................................... 5-35/ I% f" h5 c% R7 x
Noise Equations .............................................................................. 5-35
% h; z, X" ]/ o/ dNoise Summary Printout Definitions .............................................. 5-36& l* T6 x5 B6 a, T; T+ e" O& E
JFET and MESFET Temperature Equations ........................................ 5-37( W; M$ _: _1 V8 J. L$ p3 @
Temperature Compensation Equations ........................................... 5-40
/ C! q$ ^: y. {$ C7 R3 j。。。。。。。。。。。" e, z; D8 T7 F) a
$ k6 y( V( c8 m) }
# L3 R( ? b) t, u, o+ E: ^ |
|
[复制链接]
/1 
发表于 2008-3-25 17:14
QQ好友和群
QQ空间
腾讯微博
腾讯朋友
微信
收藏
支持！
反对！
thanks a lot ,very good materials
