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cuilei83

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1#
发表于 2008-8-29 14:48 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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#1 Error [ALG0031] Pin number missing from Pin "1" of Package CAP NP , C2: SCHEMATIC1, PAGE1 (3.20, 2.20). All pins should be numbered. 6 c, k* J3 j, R8 @' C
#2 Error [ALG0031] Pin number missing from Pin "2" of Package CAP NP , C2: SCHEMATIC1, PAGE1 (3.20, 2.20). All pins should be numbered. , ^$ e: a  o$ E
#3 Error [ALG0031] Pin number missing from Pin "1" of Package SW PUSHBUTTON , S1: SCHEMATIC1, PAGE1 (1.90, 2.10). All pins should be numbered. ; C! f  X1 L: R
#4 Error [ALG0031] Pin number missing from Pin "2" of Package SW PUSHBUTTON , S1: SCHEMATIC1, PAGE1 (1.90, 2.10). All pins should be numbered.
/ p, l4 n" y  m4 T) T#5 Error [ALG0031] Pin number missing from Pin "1" of Package CAP NP , C3: SCHEMATIC1, PAGE1 (3.20, 2.60). All pins should be numbered.
* r6 J8 q& m, F4 t9 n/ q, @#6 Error [ALG0031] Pin number missing from Pin "2" of Package CAP NP , C3: SCHEMATIC1, PAGE1 (3.20, 2.60). All pins should be numbered.
6 p% X# d. B4 R) Q! r#7 Error [ALG0031] Pin number missing from Pin "1" of Package R , R1: SCHEMATIC1, PAGE1 (2.50, 3.50). All pins should be numbered.
" z+ U& ?6 l0 o4 @#8 Error [ALG0031] Pin number missing fr om Pin "2" of Package R , R1: SCHEMATIC1, PAGE1 (2.50, 3.50). All pins should be numbered. / g+ i0 |: A  v% L5 }
#9 Error [ALG0031] Pin number missing from Pin "1" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered.
- L1 r% [5 d# j: q6 V#10 Error [ALG0031] Pin number missing from Pin "2" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered. ; ~3 G! C: W' L2 R; Y3 n
#11 Error [ALG0031] Pin number missing from Pin "3" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered. - U2 Q7 ^8 L. r: K7 m
#12 Error [ALG0031] Pin number missing from Pin "4" of Package 4 HEADER , JP1: SCHEMATIC1, PAGE1 (3.60, 3.10). All pins should be numbered. ) R' I" i0 i2 p2 P0 z" y' d
#13 Error [ALG0031] Pin number missing from Pin "1" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered. ' l! M. C% e' [
#14 Error [ALG0031] Pin number missing from Pin "2" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
. |% h3 z$ E5 b+ a/ Y' k  e#15 Error [ALG0031] Pin number missing from Pin "3" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
3 d, }1 z7 a, g4 \% _/ q. P#16 Error [ALG0031] Pin number missing from Pin "4" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
3 O' S# [: `" U" u. Z# ^# a$ W#17 Error [ALG0031] Pin number missing from Pin "5" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
9 p; j7 c- x1 Q8 E#18 Error [ALG0031] Pin number missing from Pin "6" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
0 |' |) K8 p+ v#19 Error [ALG0031] Pin number missing from Pin "7" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
4 O+ G9 b$ B$ B( W7 H( {#20 Error [ALG0031] Pin number missing from Pin "8" of Package 8 HEADER , JP2: SCHEMATIC1, PAGE1 (3.60, 3.60). All pins should be numbered.
& P2 C- G& q) T4 t/ u: `#21 Error [ALG0031] Pin number missing from Pin "1" of Package CRYSTAL , Y1: SCHEMATIC1, PAGE1 (3.70, 2.40). All pins should be numbered.
' I- x1 A, R, D" `#22 Error [ALG0031] Pin number missing from Pin "2" of Package CRYSTAL , Y1: SCHEMATIC1, PAGE1 (3. 70, 2.40). All pins should be numbered. + }% J8 u7 y  c7 |7 f. V
#23 Error [ALG0031] Pin number missing from Pin "1" of Package CAP_0 , C1: SCHEMATIC1, PAGE1 (2.50, 2.10). All pins should be numbered. % q  F/ d9 C1 C' D: T3 t
#24 Error [ALG0031] Pin number missing from Pin "2" of Package CAP_0 , C1: SCHEMATIC1, PAGE1 (2.50, 2.10). All pins should be numbered.
3 ]6 }3 M1 T; g# a  p  f#25 Aborting Netlisting... Please correct the above errors and retry.
( f8 ~9 C4 g4 J' B6 u% O生成网络表示产生如上错误，该如何更正？？？
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lihuizju

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2#
发表于 2008-8-29 14:54 | 只看该作者
引脚没有命名。

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3#
 楼主| 发表于 2008-8-29 14:59 | 只看该作者

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怎么修改啊 能不能详细介绍一下？

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4#
发表于 2008-8-29 16:57 | 只看该作者
Number的框框没有任何数字,这是Allgro不允许的,通常会发生这样的问题会在原本的线路图是9.X的版本,然后我们用10.X或更高的版本开启的时候所产生的

1.JPG (37.33 KB, 下载次数: 6)

1.JPG

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5#
 楼主| 发表于 2008-8-29 17:20 | 只看该作者

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这个改过来了 可是又产生错误了如下6 ]# x9 F8 m; C: `5 ^; v; D7 @4 g
********************************************************************************
. r* z& G3 S" b5 `) h7 e- _" z*
: J/ K1 O+ l4 }2 P* Netlisting the design + i4 ]2 }' H" S# C
*
% v: m  t2 i* W: h6 b4 E  h********************************************************************************3 [. r$ T% X5 r8 }5 \6 x3 M5 V
Design Name:
3 ]$ J' S0 s# f9 ^: s0 ?C:\wenjian1\yanli2.dsn
+ f# X7 [, C) mNetlist Directory:, T% Y% {+ h: o
C:\wenjian1\allegro7 T+ J1 t1 M: I8 s4 }
Configuration File:+ `4 R) u9 l9 s6 ?6 D5 h
C:\Cadence\SPB_15.2\tools\capture\allegro.cfg: g& r" n9 D- i
3 f" v$ d0 O* @( v9 Y  D8 ]8 k
Spawning... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint"
  X* \& g( K& M- O( H* e" {1 Y9 i#1 Warning [ALG0016] Part Name "CAP_0_CPCYL1/D.300/LS.200/.034_10UF" is renamed to "CAP_0_CPCYL1/D.300/LS.200/.034_".
5 a( p" P) P& N8 u#2 Warning [ALG0016] Part Name "CAP NP_0_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_0_RAD/.200X.100/LS.100/.".
! z$ u2 ]/ v/ o/ p2 L3 G#3 Warning [ALG0016] Part Name "CAP NP_1_RAD/.200X.100/LS.100/.031_30P" is renamed to "CAP NP_1_RAD/.200X.100/LS.100/.".
. O' ?% Y6 j" e) F) G#4 Warning [ALG0016] Part Name "4 HEADER_0_SIP/TM/L.400/4_4 HEADER" is renamed to "4 HEADER_0_SIP/TM/L.400/4_4 HEA".5 |7 y8 E6 y+ m
#5 Warning [ALG0016] Part Name "8 HEADER_0_SIP/TM/L.800/8_8 HEADER" is renamed to "8 HEADER_0_SIP/TM/L.800/8_8 HEA".
2 k% Z( `2 e$ t#6 Warning [ALG0016] Part Name "SW PUSHBUTTON_0_RAD/.400X.200/LS.300/.034_RESET" is renamed to "SW PUSHBUTTON_0_RAD/.400X.200/L".' q4 t, |/ O5 @" o9 D4 ~7 P7 O
#7 Warning [ALG0016] Part Name "8051_DIP.100/40/W.600/L2.050_8051" is renamed to "8051_DIP.100/40/W.600/L2.050_80".$ G6 C) Z* X" ~1 n
#8 Warning [ALG0016] Part Name "74LS373_DIP.100/20/W.300/L1.075_74LS373" is renamed to "74LS373_DIP.100/20/W.300/L1.075".
7 E; w0 b* G7 U0 Z% {#9 Warning [ALG0016] Part Name "27512_DIP.100/28/W.600) F& t4 e5 Y" y, j
/L1.400_27512" is renamed to "27512_DIP.100/28/W.600/L1.400_2".
2 ]1 B( C' X; b3 ^#10 Warning [ALG0016] Part Name "CRYSTAL_0_RAD/.400X.150/LS.300/.034_12M" is renamed to "CRYSTAL_0_RAD/.400X.150/LS.300/".3 `$ ]8 |+ U; x5 x
Scanning netlist files ...
7 V4 E% \+ [' A( W0 `% u) iLoading... C:\wenjian1\allegro/pstchip.dat  z% g0 ~0 u7 b5 ]
Loading... C:\wenjian1\allegro/pstchip.dat
; I4 J0 L7 S4 ^Loading... C:\wenjian1\allegro/pstxprt.dat
* r3 u  o% o% T+ n8 u0 c5 Z. JLoading... C:\wenjian1\allegro/pstxnet.dat
1 [* d4 {- {' b3 m3 R1 Vpackaging the design view...) h6 _4 y1 E5 N+ l( x1 w

) O1 H* V' ]  P6 x! ?, f  pExiting... "C:\Cadence\SPB_15.2\tools\capture\pstswp.exe" -pst -d "C:\wenjian1\yanli2.dsn" -n "C:\wenjian1\allegro" -c "C:\Cadence\SPB_15.2\tools\capture\allegro.cfg" -v 3 -j "PCB Footprint") S6 l  F1 e" p& o# z

: Q' q  e, v# p: E$ w
+ r8 v% w2 O5 l9 e6 L7 |" _*** Done ***( S2 |) ]+ `$ `; d
5 b' K' b8 C  z$ F  F
********************************************************************************
( b  c; M% O& ~% o; k, ^8 k/ X1 B*5 \; a/ A8 N# }8 {# Z* L
* Updating Allegro Board
  z4 w2 Y- F- u5 q9 t4 k- R, l*
# ^$ t2 [" n! ?" s) ?4 g; y1 e- [********************************************************************************1 x9 }# k; \$ U  Q% ^% T7 v4 i
Netlist Directory:/ U: p) Z* J% K1 O8 w7 v
C:\wenjian1\allegro
) c: M+ ]+ d* o/ hInput Allegro Board:
* b: y" s4 W! O) t8 gC:\wenjian1\allegro\yanli2.brd
  @6 K& a2 L4 W$ QOutput Allegro Board:
8 V0 t! R+ k& RC:\wenjian1\allegro\yanli2.brd
% m6 ?8 _9 D% R0 O, V- A+ P( P
4 j. y$ y, V( ?2 a/ l9 O$ fSpawning... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd"7 W! j, e3 S& V$ W7 Q: S+ s
Reading File : C:/wenjian1/allegro/pstchip.dat                m, T$ Y3 B* B$ E# W- g
(00:00:00.00)+ U) B5 e: E9 R* _2 i' J
Reading File : C:/wenjian1/allegro/pstxprt.dat              7 u2 q5 \9 @, ?2 g7 _& V
(00:00:00.00)7 M2 ^! Q: q6 ^9 o9 D0 j! J
Reading File : C:/wenjian1/allegro/pstxnet.dat              
; ^) v% M, a9 c& q* n. s9 f(00:00:00.00)9 S, a, }$ ?% x; l0 e. E
Starting to process component instances7 E# x1 n: v/ [, c. }7 y; u
7 C/ Y5 \; q% c" [9 X
netrev run on Aug 29 17:10:17 20086 a- \2 T3 i; ?( i+ x
   DESIGN NAME : 'YANLI2'% v4 Q( x- R+ z1 N% m8 \
   PACKAGING ON Apr  6 2004 19:58:38
! n. a8 w/ E1 }! Z8 {6 q/ a
0 L5 c! |. |8 B1 o8 A$ O& G
! Z" N4 a, o3 G! R 12 errors detected
9 G" P) D: U( n No oversight detected8 v  D2 Z5 \5 E6 f8 N# O8 G2 h0 u
No warning detected5 b8 Z& E' f9 y
6 h9 Y2 n8 H7 _: e9 ]5 V4 H
cpu time      0:00:12
) ^; m; t' e8 o6 e6 Kelapsed time  0:00:00
4 r0 g& }- C: \' R6 E- s
2 \: q  P( Q4 F2 X" g
( U; U: ~  L1 L$ `2 RExiting... netrev.exe -5 -y 1 -n -i "C:\wenjian1\allegro" "C:\wenjian1\allegro\yanli2.brd" "C:\wenjian1\allegro\yanli2.brd"
9 o8 r5 a' N1 c  Q$ {: O' YCadence Design Systems, Inc. netrev 15.2 Fri Aug 29 17:10:17 20080 k: j( [0 v- d5 g/ K7 v
(C) Copyright 2002 Cadence Design Systems, Inc.4 X" @# s7 x) M5 ?  a- `
2 z. K! R1 H* r& c
------ Directives ------
( _4 n, A# G8 W2 J; r5 B4 @: V2 G) U$ ^2 N
RIPUP_ETCH FALSE;
& ~! X$ q2 w9 \RIPUP_SYMBOLS ALWAYS;$ @; H7 A) M4 I0 B/ X3 [
MISSING SYMBOL AS ERROR FALSE;
6 k" H; ]$ r" rSCHEMATIC_DIRECTORY 'C:\wenjian1\allegro';
+ `) ?+ P2 u( s9 M% c; _1 A# W3 TBOARD_DIRECTORY '';) z, N- J' M) D3 Z% M) @
OLD_BOARD_NAME 'yanli2.brd';( f. `- E: F! f/ V5 E
NEW_BOARD_NAME 'yanli2.brd';4 t: n8 \! J" c" t: i8 a

3 s; t0 }$ v$ e( ^4 M$ D3 TCmdLine: netrev.exe -5 -y 1 -n -i C:\wenjian1\allegro C:\wenjian1\allegro\yanli2.brd C:\wenjian1\allegro\yanli2.brd
! h6 V& M5 q: ]( s3 Q2 E9 c' x* o0 U
------ Preparing to read pst files ------
; |& i! G" k" ]% A; R
8 \0 a! d- b& D# _6 oStarting to read C:/wenjian1/allegro/pstchip.dat
9 H$ v! A  ^/ D/ u- x+ l) b   Finished reading C:/wenjian1/allegro/pstchip.dat (00:00:00.00)
6 d6 g! H& V3 h5 ]3 ^! xStarting to read C:/wenjian1/allegro/pstxprt.dat : I; L  t9 x$ s# M4 m( o" ?
   Finished reading C:/wenjian1/allegro/pstxprt.dat (00:00:00.00)
/ _3 g3 ^3 O* |8 y, @3 {) y' }Starting to read C:/wenjian1/allegro/pstxnet.dat $ ~! y7 G) S. m. L4 G9 Z& I+ C
   Finished reading C:/wenjian1/allegro/pstxnet.dat (00:00:00.00)( X7 O* d' L& P. b7 J  i5 O5 J

  v# j& y8 ~* l6 q------ Oversights/Warnings/Errors ------
- x# m* n+ y. h) V+ C* [0 V, P, z. a3 r! T
6 R) x6 J0 m! J% v$ T+ k
#1   ERROR(302) Device library error detected.
* q" T7 p7 w, r% a# e
; I1 G' P4 S, {Problems with device 'CRYSTAL_0_RAD/.400X.150/LS.300/'. JEDEC_TYPE property 'RAD/.400X.150/LS.300/.034' is illegal: 'Package name is not legal.'.+ m0 n, m! E3 ]

: I5 \. F% M1 X8 ^Device 'CRYSTAL_0_RAD/.400X.150/LS.300/' has library errors. Unable to transfer to Allegro.
8 r6 p% O' Y2 W9 J- u- X0 j
  @0 j; B$ Y" B#2   ERROR(302) Device library error detected.
, N. t' S& b) c
0 D) M  }, ?1 E9 E. p% j: P5 z7 WProblems with device '27512_DIP.100/28/W.600/L1.400_2'. JEDEC_TYPE property 'DIP.100/28/W.600/L1.400' is illegal: 'Package name is not legal.'.
* i$ T( Q9 z% E2 D
- W$ a! A4 d' c' C' j2 KDevice '27512_DIP.100/28/W.600/L1.400_2' has library errors. Unable to transfer to Allegro.
+ v9 w8 i% x5 T
1 o3 Z% V/ u! ^' D#3   ERROR(302) Device library error detected.
* X4 C: T  {/ _1 I5 p* Y; n  M0 p0 f
Problems with device '74LS373_DIP.100/20/W.300/L1.075'. JEDEC_TYPE property 'DIP.100/20/W.300/L1.075' is illegal: 'Package name is not legal.'.% V( G  F8 W5 M- F

3 o6 K) U9 {' Z" i8 g1 a# IDevice '74LS373_DIP.100/20/W.300/L1.075' has library errors. Unable to transfer to Allegro.
6 X* G/ }; C/ }& R% i
7 Y9 A: v5 u' \+ R; l2 X1 k#4   ERROR(302) Device library error detected.0 O: v8 }) I2 S: Z  Y
. ]8 q4 S+ r4 \) X
Problems with device '8051_DIP.100/40/W.600/L2.050_80'. JEDEC_TYPE property 'DIP.100/40/W.600/L2.050' is illegal: 'Package name is not legal.'.4 A- J! B+ h7 X% o6 O' u

) }) s3 d7 b- S8 p) vDevice '8051_DIP.100/40/W.600/L2.050_80' has library errors. Unable to transfer to Allegro.6 ]& c9 y8 _' A% D0 I" k* U
7 v5 Y9 C2 s9 p
#5   ERROR(302) Device library error detected.
8 D  h4 ^- e  f" y1 D( i7 u& z
Problems with device 'SW PUSHBUTTON_0_RAD/.400X.200/L'. JEDEC_TYPE property 'RAD/.400x.200/LS.300/.034' is illegal: 'Package name is not legal.'.6 u. ?+ _* P/ {+ `6 x
( v# {$ b5 n0 J+ e- M) Y
Device 'SW PUSHBUTTON_0_RAD/.400X.200/L' has library errors. Unable to transfer to Allegro.
$ l5 P6 M$ v( B# p2 d0 @' v* C% l" O* e4 H
#6   ERROR(302) Device library error detected.
5 ~' X! E( g) D$ k
. V+ G3 h; `- b+ D6 x: ~3 pProblems with device 'R_0_AX/.400X.100/.034_10K'. JEDEC_TYPE property 'AX/.400X.100/.034' is illegal: 'Package name is not legal.'.
8 B9 a8 ?9 _, N  |
- y% r0 M4 r2 J; ^Device 'R_0_AX/.400X.100/.034_10K' has library errors. Unable to transfer to Allegro.
1 B% B) F4 d- j: k) |. K, G( F+ p3 x) O3 o" y& _. c6 |
#7   ERROR(302) Device library error detected.4 [% b$ c& k; g3 z$ i' p
! s. |; {% ]+ G+ W
Problems with device '8 HEADER_0_SIP/TM/L.800/8_8 HEA'. JEDEC_TYPE property 'SIP/TM/L.800/8' is illegal: 'Package name is not legal.'.
, l0 M: F* y; a: S( v
5 \; W3 I( V& M  h4 JDevice '8 HEADER_0_SIP/TM/L.800/8_8 HEA' has library errors. Unable to transfer to Allegro.
" ^! A  U2 J8 b2 Y" f4 P
, K4 x6 d, X9 }2 V$ O# k7 l& T- @% r8 M- G#8   ERROR(302) Device library error detected.2 M. B$ }* P1 @, z0 V8 }/ Y* ?! k7 n% [- K
2 e$ q3 i+ T4 |' a+ v8 C0 j+ p
Problems with device '4 HEADER_0_SIP/TM/L.400/4_4 HEA'. JEDEC_TYPE property 'SIP/TM/L.400/4' is illegal: 'Package name is not legal.'.9 D, }0 ?( E5 |' o
' E/ n" }" l6 \2 n; H' F* n$ u- D% m
Device '4 HEADER_0_SIP/TM/L.400/4_4 HEA' has library errors. Unable to transfer to Allegro.; x: x% i* O! F4 e( Q
( F' |. K1 g. l
#9   ERROR(302) Device library error detected.
+ B2 w' j, t3 {7 e7 q  p+ m" h
5 O# u' Y4 D; m; TProblems with device 'CAP NP_1_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'.
: q9 U( o8 e/ }, ~2 w5 t; i3 r) k  H( e) g
Device 'CAP NP_1_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro.
6 f+ k1 r: y, |1 Y6 |. A1 j9 }/ r$ e1 B
#10  ERROR(302) Device library error detected.# v( a3 a" m( W3 d, n) i2 [. S
: N' W! m2 ^& \( h5 l- ?
Problems with device 'CAP NP_0_RAD/.200X.100/LS.100/.'. JEDEC_TYPE property 'RAD/.200X.100/LS.100/.031' is illegal: 'Package name is not legal.'.
  N7 Y6 G- M% N1 S& O- r" u+ S; N; N7 L/ J
Device 'CAP NP_0_RAD/.200X.100/LS.100/.' has library errors. Unable to transfer to Allegro.
; j4 {8 e- M' K+ {$ L# @" E, V; w
$ x# w! v# X6 k& [% z#11  ERROR(302) Device library error detected.) ]6 O. ~/ g5 p/ D. R% \% W

) z$ U! d/ P$ e* ~/ `% }Problems with device 'CAP_0_CPCYL1/D.300/LS.200/.034_'. JEDEC_TYPE property 'CPCYL1/D.300/LS.200/.034' is illegal: 'Package name is not legal.'.- L* O0 ]' y) X$ X+ g
& L6 W- Z! b: u; L- e
Device 'CAP_0_CPCYL1/D.300/LS.200/.034_' has library errors. Unable to transfer to Allegro.
9 [4 O0 [( d3 H( f* L1 @2 Z: |  Y, y! G4 t9 q
------ Summary Statistics ------
7 Z$ N+ l6 Z% d9 a) i# e* d" J" C- e8 z! u- d3 r7 n

$ i7 L1 m& H, H; U8 b#12  ERROR(102) Run stopped because errors were detectedへ
( b! G: _8 X2 v" c; Z5 W% D( W) V: b
9 a/ ]. ?8 ]! v0 j+ ^1 M
netrev run on Aug 29 17:10:17 2008
  U+ R0 ~0 w4 _& Z   DESIGN NAME : 'YANLI2') }! M! i0 {- b7 E2 r
   PACKAGING ON Apr  6 2004 19:58:38
6 W3 T/ @: S% i4 H, T* p! C6 M3 }6 I4 \" I
   COMPILE 'logic'4 C- K0 q& R/ J: g
   CHECK_PIN_NAMES OFF8 y# _; ^% p+ C$ Z, X% L6 Y8 g! W
   CROSS_REFERENCE OFF
8 X5 p* R, s% h* U5 k: p   FEEDBACK OFF& w" W2 l  _( N' t+ R+ q6 T
   INCREMENTAL OFF
' c/ z1 C3 |1 \( Z   INTERFACE_TYPE PHYSICAL
. v1 |- t4 X( u" V7 \* _   MAX_ERRORS 500
3 l! y  X/ [' q: d+ K0 v   MERGE_MINIMUM 5
2 V2 k! }+ }1 [8 O- ~6 M   NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
* B! s; Q. c+ p& D7 F; x& q   NET_NAME_LENGTH 247 R1 V/ @+ ^3 ~! S* U6 F
   OVERSIGHTS ON6 \: u. m7 F2 d/ ]4 B$ j8 L- i
   REPLACE_CHECK OFF$ s! V8 p& U( D* u$ e( _8 t
   SINGLE_NODE_NETS ON5 x5 x: _; I& D4 m" f6 ~" B
   SPLIT_MINIMUM 0; l7 D" ?# X& C6 B  a9 U
   SUPPRESS   209 c0 A- K! {) b# V# K
   WARNINGS ON5 |' \1 E& F: p' u

3 ?" o. k, L5 I) U2 j1 |+ g, O 12 errors detected6 d$ F, K( v& G/ z! {
No oversight detected
+ V* K) `  C0 d No warning detected: K: A2 f+ ~+ j, J1 S4 J" w1 X! B

6 c$ T+ c' j5 s6 s' }9 gcpu time      0:00:12
! J9 i2 O% @! b: `1 eelapsed time  0:00:00
- t) g% S: k- t/ w/ o3 X! `8 g
: N4 S0 o% q6 d& X2 q
' x  t! c3 {: S5 p
0 w! v: N; D9 q& U/ R! d, j$ `  |*** Done ***8 D, T; Y  C! e5 E- W1 O7 B0 A: P; w
8 q/ q6 v$ W3 ~  e! F
********************************************************************************
: Z5 t# y2 ]5 P3 [4 \*8 u2 I* R+ |5 I' r3 @, A1 j
* Spawing Allegro / x: a2 W6 y4 ?6 e; x4 z9 S9 q
*
  W4 r9 v/ M; }# T2 l0 Q********************************************************************************
/ I( O, y2 q( n# h3 s& F* dSpawing "C:\Cadence\SPB_15.2\tools\pcb\bin\allegro.exe" -mpssession Administrator "C:\wenjian1\allegro\yanli2.brd"   ?3 K6 c4 N% e1 E

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*** Done ***
0 D- V# m4 k8 X0 Q8 c- {) g3 X* t' }怎么回事

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cuilei83

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 楼主| 发表于 2008-8-29 17:25 | 只看该作者

文件如下 请高手再指点！！！

谢谢  orz

wenjian1.rar

17.91 KB, 下载次数: 10, 下载积分: 威望 -5

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chyp840527

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发表于 2008-8-29 22:45 | 只看该作者
帖子不要发一大串，看的不爽，没心情帮你改错，同类型错误发一个就行了，把所有的错误都发出来，自己不分析一下就来问，那是对自己的不负责

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lihuizju

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发表于 2008-8-30 00:24 | 只看该作者
'Package name is not legal.'.说得很清楚嘛，封装命名有问题，出现了非法字符。Allegro中的封装名不能出现“.”似乎“/”也是非法字符。唉，其他的就不说了。

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cuilei83

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 楼主| 发表于 2008-8-30 10:38 | 只看该作者

刚开始学啊 有很多不是很明白

不好意思啊 我用的封装是layout 中的  是不是allegro 中的封装不能用layout中的？？？谢谢诶

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