|
|
EDA365欢迎您！
您需要 登录 才可以下载或查看，没有帐号？注册
x
更新内容及模块：
3 {! G5 H$ p/ B% A; Y2 t1 @DATE: 06-14-2013 HOTFIX VERSION: 011& G8 C9 v2 } g! H+ b6 ?
===================================================================================================================================, r5 f6 N: T5 |
CCRID PRODUCT PRODUCTLEVEL2 TITLE
1 J M* K8 {2 q; _- C+ @===================================================================================================================================" t$ j8 F# v0 A
982306 CONCEPT_HDL OTHER When plotting a PDF publisher output the page coming out half inch bigger in pdf
& s" B: O( Z" ]8 p) E& w3 C: h5 I1055338 SIP_LAYOUT DRC_CONSTRAINTS Soldermask to Via drcs on bondfingers) G6 C& D$ M6 \
1093375 ALLEGRO_EDITOR PLACEMENT Align Module with Zero spacing value space the modules further away the modules should be nearer
0 U3 \; X+ ^) @+ T* d1103201 RF_PCB FE_IFF_IMPORT Wrong permissions to map file during IFF import6 F0 v, K2 V$ @- R
1106900 CONCEPT_HDL COMP_BROWSER Component Browser performance utility should honor CPM directives for include and exclude PPT
6 A' Q$ z7 b! D q, l1110178 ALLEGRO_EDITOR EDIT_ETCH Line Width Retention should be controlled via setting
) X& `. y: F: K: v# \$ W8 h D @1110323 APD DXF_IF DXF out is offsetting square discrete pads.
! @" }4 Y. j% A4 x4 W+ ]' \8 Z1123581 ALLEGRO_EDITOR MANUFACT Dimension Line gets changed on board4 u, K* q: Q1 |; [1 o
1134083 CONCEPT_HDL OTHER Published PDF file's hyperlinks do not work fine when user use double digits partitions for page Border.
$ d3 I4 G' u$ {$ B4 t+ S1139338 ALLEGRO_EDITOR DRC_CONSTR The total etch length does not seem to work for Xnets after setting the variable "retain_electrical_constraints_on_nets"/ S$ q7 {- m( l/ o7 i3 B8 z
1139361 ALLEGRO_EDITOR DRAFTING Angular dimension tolerance is incorrect when plus minus tolerances are equal.# Q' [: \6 L% G- L. X" g9 [/ ~
1141882 ALLEGRO_EDITOR EDIT_ETCH Allegro Crashes during diffpair slide' ?' K; o6 g3 x9 ` ~& U" g
1142876 ALLEGRO_EDITOR SHAPE No DRC error when airgap between place bounds exactly zero
' Q1 @9 Y( r& h; k& T3 C1145235 CONCEPT_HDL CONSTRAINT_MGR DEHDL CM gives error when trying to launch SigXP
; Z `4 \$ {+ C4 O6 y: |1145243 ALLEGRO_EDITOR NC Duplicate drills found in the NC Drill output$ ?. l# y2 Q. U9 U
1145260 SIP_LAYOUT DIE_EDITOR Enable "Copy" in die editor: q" M0 l- |, A7 N# n' U
1145284 CONCEPT_HDL CORE Publish PDF crashes DE HDL3 ?, O2 R. B$ c9 t# c
1145333 ALLEGRO_EDITOR SHAPE SHAPE boundary may not cross itself. Error cannot be fixed.
$ B; [5 c, f6 D# I) s3 e1145856 ALLEGRO_EDITOR DRC_CONSTR DRC Line to Thru Pin appear while Fillet be added9 `; f1 C8 i* U" D" D- V$ S
1146287 PCB_LIBRARIAN CORE PDV expand pins and change origin sets coordinates for few pins wrong and places pins on top of each other after collaps
& p" k. i- A3 J' _4 R: s. n% w1146865 ALLEGRO_EDITOR DATABASE Allegro crashes when trying to place mechanical symbol
5 l- P3 N+ A+ e* n: K! v# y p- j1148513 ALLEGRO_EDITOR OTHER Importing a subdrawing file causes incorrect net name assignment.
! I% K! t) o1 N7 s& l; U% ^1148734 CONCEPT_HDL OTHER Logical Symbol Text is turned upside down after extracting PDF by Publish PDF
- l' o2 L1 n6 [1149025 ALLEGRO_EDITOR INTERFACES IPC-2581 imports cross-hatched shapes as solid
3 C5 ]7 I+ t% g B1 j; v1149948 APD OTHER Stream_out hangs on this design -- hang processing merge of overlapping shapes using poly_deletecolinear_only()
- q! v0 H8 N( C0 E6 `1150274 CONCEPT_HDL CORE Uprev from 16.3 to 16.6 is not preserving RefDes
# m0 L- z# y) b! }3 U1151450 SIP_LAYOUT DXF_IF DXF export from CDNSIP missing symbols+ k# ~1 R5 J% x1 R1 z
& f0 G5 Y- e2 U! I, z( }5 N% Y6 [5 X v1 S
下载链接：* C% e' V- P$ D2 T2 G j( K' y
http://pan.baidu.com/share/link? ... 5&uk=38260382942 R! i. c4 m4 f: }- |) _
|
评分
-
查看全部评分
|
/1 
发表于 2013-6-16 15:39
QQ好友和群
QQ空间
腾讯微博
腾讯朋友
微信
收藏
支持！
反对！
期待16.7.。。。。。。。。
