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Table of Contents" R5 P) L# I& d# [
Audience ............................................................................................. iii* i. t9 j2 v C
Related Documents ............................................................................. iii
! b2 C, f$ e1 J- p' qConventions ........................................................................................ iv( d7 ^+ L! `# [: ?/ j9 f( q1 a$ Q
Obtaining Customer Support .............................................................. vi
4 y, Q% s$ B9 ^Other Sources of Information ............................................................ vii
% x X- f$ g* ~# z9 d2 cRevision History ............................................................................... viii$ y: G( [, F1 [$ ]
Chapter 1 - Overview of Models ..................................................................... 1-19 T: J! V& w3 |5 K, l6 ?1 _
Using Models to Define Netlist Elements .............................................. 1-26 ]4 R* N% R3 \# V. r; D- M
Supported Models for Specific Simulators ....................................... 1-2
5 k# v5 h2 X) g0 \2 U# n; G, zSelecting Models .............................................................................. 1-3
/ p* `! g' K' p. x' Q9 [Example ............................................................................................ 1-3) \8 G- K8 M; f# u/ W8 J
Chapter 2 - Using Passive Device Models....................................................... 2-19 z* E# A8 P2 y
Resistor Device Model and Equations .................................................... 2-23 }% i! o! Z6 }% o0 [
Wire RC Model ................................................................................. 2-2
- M' u4 ~0 j! w2 EResistor Model Equations ................................................................. 2-5
$ ^9 B# V1 v* e. B9 M0 JCapacitor Device Model and Equations ............................................... 2-109 s$ a& e( A% r$ i
Capacitance Model ......................................................................... 2-10- s* H! G' c0 g
Capacitor Device Equations ........................................................... 2-11
6 e8 X) n. P8 M. s* ?, O5 v8 HInductor Device Model and Equations ................................................. 2-14
L8 P$ K% u) p J, J0 ~Inductor Core Models ..................................................................... 2-15! y! M) R+ ^5 a# X
Magnetic Core Element Outputs .................................................... 2-18$ p% b9 _8 q, ?, Z/ H$ k3 A5 Y$ S% W
Inductor Device Equations ............................................................. 2-19" ~: @3 B8 w. h
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21
3 O1 E1 Q0 {( n9 l) APower Sources ....................................................................................... 2-30
4 h. u4 d+ }/ I2 L8 M2 gIndependent Sources ....................................................................... 2-30+ t+ ^3 i1 t4 [* B
Controlled Sources .......................................................................... 2-33 O9 v1 [4 ]" M8 g. A
Chapter 3 - Using Diodes ................................................................................. 3-1/ ?3 V* b' i; z- c z" z
Diode Types ............................................................................................ 3-25 D- A& g( m9 z- q! l9 K
Using Diode Model Statements .............................................................. 3-3( c" x/ E8 F1 E% d- d
Setting Control Options .................................................................... 3-38 E4 W) ]( H& e" Z& c: W4 O. J% @
Specifying Junction Diode Models ......................................................... 3-5
, n* ]' [% G& O$ s+ w6 ^Using the Junction Model Statement ................................................ 3-68 L- S% t4 D y1 F* g0 _7 ~
Using Junction Model Parameters .................................................... 3-7
( Y! C( N# i! l) o3 AGeometric Scaling for Diode Models ............................................. 3-133 Z0 R6 w8 u: \7 P- J
Defining Diode Models ................................................................... 3-15" j) B' X/ @7 R; q1 j
Determining Temperature Effects on Junction Diodes ................... 3-18
- H) K/ s/ k6 S) e2 A" a3 [1 qUsing Junction Diode Equations ........................................................... 3-217 w4 d8 ~$ ~% [, u
Using Junction DC Equations ......................................................... 3-22
. _( J$ t! f0 F" N }Using Diode Capacitance Equations ............................................... 3-25# P9 c- ~# w9 N
Using Noise Equations .................................................................... 3-27$ G! G- O& I( w0 F
Temperature Compensation Equations ........................................... 3-28
6 T2 {$ h3 k0 r0 y' {. v6 |# gUsing the Junction Cap Model .............................................................. 3-32- F. N' G- g! z. U
Setting Juncap Model Parameters ................................................... 3-336 i' D: V; X i+ R1 ]1 t5 a7 j
Theory ............................................................................................. 3-33
$ H% F4 H& e6 c WJUNCAP Model Equations ............................................................. 3-38/ w( P* | F" b1 R8 ^
Using the Fowler-Nordheim Diode ...................................................... 3-46
% l1 Z/ }4 L. s% d+ qConverting National Semiconductor Models ........................................ 3-48
9 O- W. I7 D" E. G& [- f: ]/ ^: zChapter 4 - Using BJT Models ........................................................................ 4-1! C- Z& X6 S8 x# s( L$ ~9 G) K
Using BJT Models .................................................................................. 4-2& T2 ?5 T& d0 ]5 D, ]( z7 g
Selecting Models ............................................................................... 4-2
1 F- C: K z3 g1 O/ KBJT Model Statement ............................................................................. 4-43 |' B% H3 X9 O# o5 t4 B
Using BJT Basic Model Parameters ................................................. 4-5# g. }, S& K$ l7 ]( F9 P: F+ K3 X
Handling BJT Model Temperature Effects ..................................... 4-15
9 M$ [, _ z: b! |$ Z; N$ ?0 R7 MBJT Device Equivalent Circuits ............................................................ 4-21+ L2 M: \, t; ~5 B/ p5 Z
Scaling ............................................................................................. 4-21
/ _( h0 g. J9 Z& xUnderstanding the BJT Current Convention ................................... 4-21
, m$ B5 q* ]* pUsing BJT Equivalent Circuits ....................................................... 4-22
1 G! _0 W M; F9 K& U6 \7 a& d$ w1 QBJT Model Equations (NPN and PNP) ................................................. 4-307 C( B; T. X1 i
Understanding Transistor Geometry in Substrate Diodes .............. 4-30
, ^' B5 f* |, B7 qUsing DC Model Equations ............................................................ 4-328 ^+ d; I- v) q. N/ h5 K: v
Using Substrate Current Equations ................................................. 4-33( M, L) V' ~9 R0 L
Using Base Charge Equations ......................................................... 4-34
; d6 M$ e; {3 @" P; a# h$ |Using Variable Base Resistance Equations .................................... 4-35
7 j3 j9 d7 o# fUsing BJT Capacitance Equations ........................................................ 4-36* R8 T- u5 J+ i
Using Base-Emitter Capacitance Equations ................................... 4-36# l9 n4 ] v# Y* }
Determining Base Collector Capacitance ....................................... 4-380 |3 Q; R M, M( S, v/ A J- g
Using Substrate Capacitance ........................................................... 4-40$ R) p7 t+ }5 c4 x/ W9 d
Defining BJT Noise Equations ............................................................. 4-428 E G4 X* |, } s7 N8 i
BJT Temperature Compensation Equations ......................................... 4-44
& ]& g2 a, n! k/ VUsing Energy Gap Temperature Equations .................................... 4-44
$ F4 U& p) v" N/ w/ gSaturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
. Z4 ?* N# U( ]) a5 VUsing Saturation and Temperature Equations, TLEV=1 ................ 4-46
: T6 h+ b& @* A( L: H' bUsing Saturation Temperature Equations, TLEV=3 ....................... 4-47' c/ p2 w2 i+ v' m& k
Using Capacitance Temperature Equations .................................... 4-49
8 f* a$ m2 F; h s: z# vParasitic Resistor Temperature Equations ...................................... 4-51, X, B6 d1 K8 M$ N! H" R* r5 Q
Using BJT Level=2 Temperature Equations .................................. 4-52
. }% s) R* \+ ?; g) GBJT Quasi-Saturation Model ................................................................ 4-53
: ]: N# z! b0 a! a# u4 {/ G- PUsing Epitaxial Current Source Iepi ............................................... 4-55
) f0 x# h* y/ o' |$ hEpitaxial Charge Storage Elements Ci and Cx ............................... 4-55' D+ L5 p5 C5 [
Converting National Semiconductor Models ........................................ 4-58
- N6 j- ~, |* h: ^) w# UVBIC Bipolar Transistor Model ........................................................... 4-605 X! w4 b- S7 p6 c8 \$ A6 D$ C$ c
Understanding the History of VBIC ............................................... 4-60
# y" [* s2 N/ h0 M9 G- L6 }VBIC Parameters ............................................................................ 4-612 t8 M4 q4 U* A/ _: \
Noise Analysis ................................................................................ 4-62" J/ b- F% a( V6 Y
Level 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
9 Q; A% N% B, YLevel 6 Element Syntax .................................................................. 4-712 `- b! q$ q# w4 D
Level 6 Model Parameters .............................................................. 4-72
; J0 p, g! ^/ t5 ~+ D6 XLevel 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78
4 b6 A9 ?4 T9 K% C/ mNotes ............................................................................................... 4-797 D( z- I2 \( I. o# U7 R+ d
Level 6 Model Parameters (504) ..................................................... 4-80
, a9 }: I' I" ^: v+ yLevel 8 HiCUM Model ......................................................................... 4-94
" F( f6 Z0 S4 B& d# F3 XWhat is the HiCUM Model? ........................................................... 4-94
' Y$ x# @/ \/ @8 q U/ @HiCUM Model Advantages ............................................................ 4-94
0 {' [& X; Y: z0 H9 r3 yAvant! HiCUM Model vs. Public HiCUM Model .......................... 4-96
0 m$ V; T) c: |6 B2 J2 F, cModel Implementation .................................................................... 4-96
: b. |6 m/ }; F0 f) c5 jInternal Transistors ......................................................................... 4-973 I4 Q+ |6 o [; ^! j" o v
Level 9 VBIC99 Model ...................................................................... 4-110
1 l" ]/ E8 Z- W$ h H* cElement Syntax of BJT Level 9 .................................................... 4-110
% x9 f% ]6 j" ]Effects of VBIC99 ........................................................................ 4-112! y1 w5 m+ G6 p' P; E& g _9 b
Model Implementation .................................................................. 4-112
2 g% ^3 ], ?: s) G: G2 O- z( OExample ........................................................................................ 4-119
, F: Q" Q2 a" H5 _" DVBIC99 Notes for HSPICE Users ................................................ 4-123
, O& N6 ]8 E! F& _, T6 JLevel 10 Phillips MODELLA Bipolar Model .................................... 4-124
$ k3 E' C& p8 p7 g. A0 pModel Parameters ......................................................................... 4-124
& e" N7 L6 W9 b4 ?1 F6 bEquivalent Circuits ........................................................................ 4-129
* N9 q) z+ u* C$ a. e5 _4 VDC Operating Point Output .......................................................... 4-131 D( ~+ t' Y5 O5 T# \ I- h
Model Equations ........................................................................... 4-1321 Z7 h6 d& k5 Z! r! p7 C( d5 `
Temperature Dependence of the Parameters ................................ 4-1428 n4 I$ T# S! W9 m/ F
Level 11 UCSD HBT Model .............................................................. 4-1463 ?) L3 A3 {4 c3 ]" t
Using the UCSD HBT Model ....................................................... 4-146
R. k9 U* D# E7 C+ |- B( D+ G9 _- y& C8 nDescription of Parameters ............................................................. 4-1473 L1 J( b5 h' J$ I
Model Equations ........................................................................... 4-152. m. k8 K2 J# v* U
Equivalent Circuit ......................................................................... 4-1631 }( I& @( b9 s# l
Example Avant! True-Hspice Model Statement ........................... 4-1658 }! \) d# Z, X( j( {
Chapter 5 - Using JFET and MESFET Models............................................. 5-14 J4 n- Z0 h. P
Understanding JFETs .............................................................................. 5-2
, U( W' p1 }1 [1 x8 E# l& b! D0 HSpecifying a Model ................................................................................. 5-3' F3 e0 D0 ^3 ^1 I
Understanding the Capacitor Model ....................................................... 5-5
4 e: d, c6 Z& M' F- T0 hModel Applications ........................................................................... 5-5
* T; N5 _# F' K% yControl Options ................................................................................. 5-6
* X0 b0 `: b+ ]/ T8 `% T- q/ RJFET and MESFET Equivalent Circuits ................................................. 5-7# k) j* g7 a* a" \
Scaling ............................................................................................... 5-7
, G- Y# C- d# }" oUnderstanding JFET Current Convention ........................................ 5-7! n( v1 n9 f0 T; \, ]
JFET Equivalent Circuits .................................................................. 5-8
/ z6 V: t4 C: n, PJFET and MESFET Model Statements ................................................. 5-13) M2 y0 ~: h" ` x+ u' }3 D$ C, G
JFET and MESFET Model Parameters ........................................... 5-13
2 q8 z, [2 f2 Y ^, x( J, ^Gate Diode DC Parameters ............................................................. 5-15! _& k' z+ O# f8 R/ p0 |$ U
JFET and MESFET Capacitances ................................................... 5-25
4 A& T+ m" [! t4 ]: X6 oCapacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-29
6 k$ R2 \& |: k0 Y4 ]5 LJFET and MESFET DC Equations ................................................. 5-316 L. K2 `% |( k
JFET and MESFET Noise Models ....................................................... 5-35
4 M O: [/ r# p! k( `) R1 iNoise Parameters ........................................................................... 5-35/ c, ?* V8 w& v8 g4 N) N
Noise Equations .............................................................................. 5-355 R: ~% I% X3 r& W; |
Noise Summary Printout Definitions .............................................. 5-36
% s P* m6 _" X) eJFET and MESFET Temperature Equations ........................................ 5-37+ `7 C2 T1 P {" T* y
Temperature Compensation Equations ........................................... 5-40
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