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Table of Contents
' G h; N' h0 i* ^" i* yAudience ............................................................................................. iii
, w' n& C/ ~4 z0 b8 H oRelated Documents ............................................................................. iii8 l, A/ x) `* f9 n
Conventions ........................................................................................ iv- k4 W- N, s' U, O
Obtaining Customer Support .............................................................. vi
- e4 L0 }; m" @; M5 t8 }" FOther Sources of Information ............................................................ vii
9 y3 q# t( f; k) l4 S* H1 L( ]Revision History ............................................................................... viii4 U4 N; r& ]& H0 v
Chapter 1 - Overview of Models ..................................................................... 1-1: z. z) n( k% M; Q2 c- D N o! h$ A
Using Models to Define Netlist Elements .............................................. 1-2; ?- v$ z0 U, A0 o# E
Supported Models for Specific Simulators ....................................... 1-29 s- C3 t+ [8 s7 a
Selecting Models .............................................................................. 1-38 ]. b6 ^8 a7 h' t" w; s
Example ............................................................................................ 1-3- s( p) S3 r; F0 h
Chapter 2 - Using Passive Device Models....................................................... 2-1
% y$ {% o% X3 ^. ~, _' sResistor Device Model and Equations .................................................... 2-2% U( d: `+ ?0 b1 v" v9 ^
Wire RC Model ................................................................................. 2-2
2 i. ?% t( u% T- y9 q7 a8 j) ~: PResistor Model Equations ................................................................. 2-5
+ V/ S7 k5 H, n' YCapacitor Device Model and Equations ............................................... 2-10
7 K9 m+ S% e. Y0 w. O: j# kCapacitance Model ......................................................................... 2-10
' A4 Y5 Z9 I/ g+ A! hCapacitor Device Equations ........................................................... 2-11
& c0 V; r) U9 q7 t7 l5 y+ x5 }Inductor Device Model and Equations ................................................. 2-14
" U2 E" n3 ^: k% i* dInductor Core Models ..................................................................... 2-15
) e7 Z) l7 X) Y% e& k2 n/ _Magnetic Core Element Outputs .................................................... 2-18$ d8 U0 d0 }8 `
Inductor Device Equations ............................................................. 2-19$ B8 ^% N$ y6 w% U1 K
Jiles-Atherton Ferromagnetic Core Model ..................................... 2-21 w" q5 B; q5 `% q
Power Sources ....................................................................................... 2-30
3 u6 g4 e( G. r2 o; E2 B/ M7 I9 uIndependent Sources ....................................................................... 2-30% N. ?' e) t3 e6 E+ k( r1 O
Controlled Sources .......................................................................... 2-33% o! ?5 u, M H9 |9 w6 r/ A
Chapter 3 - Using Diodes ................................................................................. 3-19 Z+ i# h: k I
Diode Types ............................................................................................ 3-2, ^! p# l( J+ e# ?/ w. `
Using Diode Model Statements .............................................................. 3-3# W/ ?* `1 I* @9 T6 O3 G4 O6 N
Setting Control Options .................................................................... 3-3# _. \5 i$ ^% ?, ]' C: D
Specifying Junction Diode Models ......................................................... 3-53 Q+ y5 N8 _8 R2 W4 w) Q+ e
Using the Junction Model Statement ................................................ 3-6& C z" i2 u" v' N1 l
Using Junction Model Parameters .................................................... 3-7
+ A/ g Y* P4 m6 S' X( ^# ^! HGeometric Scaling for Diode Models ............................................. 3-13# V% M- U0 N! c6 o0 L6 K
Defining Diode Models ................................................................... 3-15
) R% O4 U: k3 Q' F2 q* DDetermining Temperature Effects on Junction Diodes ................... 3-18
* w* n$ H! [ V EUsing Junction Diode Equations ........................................................... 3-21
# j0 O3 N5 W9 I: u- c$ PUsing Junction DC Equations ......................................................... 3-22! P& y+ T! J5 p
Using Diode Capacitance Equations ............................................... 3-25
/ y, T* N" l# pUsing Noise Equations .................................................................... 3-27 z Y! D; x* a5 W& Q# p
Temperature Compensation Equations ........................................... 3-287 Y; L; l/ _6 G- a# v, t( _" g
Using the Junction Cap Model .............................................................. 3-32& U2 G6 z% ?" |8 M
Setting Juncap Model Parameters ................................................... 3-33
$ j; r$ I+ @* e" @3 PTheory ............................................................................................. 3-33
% x) Y3 @ f; F5 V- V% n0 W! NJUNCAP Model Equations ............................................................. 3-38( K5 |, Y- W7 n5 T; b9 @1 y( r
Using the Fowler-Nordheim Diode ...................................................... 3-46
- @% I% | w( V {2 jConverting National Semiconductor Models ........................................ 3-48
; \9 g! J" Q' RChapter 4 - Using BJT Models ........................................................................ 4-1
7 I% B5 n4 i3 ]3 N9 V( mUsing BJT Models .................................................................................. 4-2
4 t3 A8 W4 X1 G( u5 iSelecting Models ............................................................................... 4-2
9 U9 v: |: G3 `! V- v( A& z( pBJT Model Statement ............................................................................. 4-4
5 m R' x; q' ]( {; m9 f* YUsing BJT Basic Model Parameters ................................................. 4-5
! ?1 D4 T- y' J/ b3 z0 tHandling BJT Model Temperature Effects ..................................... 4-15, V& V( H) Q: b: v$ \+ f
BJT Device Equivalent Circuits ............................................................ 4-21
t9 C) Z1 Y. FScaling ............................................................................................. 4-21
0 \2 P- V1 _& yUnderstanding the BJT Current Convention ................................... 4-21
8 f/ T3 h. b& X# r. ~! j2 MUsing BJT Equivalent Circuits ....................................................... 4-22; o8 N' U+ C/ \" m# _! P- E) b
BJT Model Equations (NPN and PNP) ................................................. 4-30
- o! `7 o3 \4 i/ a2 j! G3 OUnderstanding Transistor Geometry in Substrate Diodes .............. 4-30
& x: k4 Q# m. ?/ q h" fUsing DC Model Equations ............................................................ 4-32) T* B* l4 u7 l
Using Substrate Current Equations ................................................. 4-33
- i- A3 t8 d9 v; A( RUsing Base Charge Equations ......................................................... 4-344 ]1 R( P8 s2 A$ ]# H
Using Variable Base Resistance Equations .................................... 4-35, j# F, M/ m# q+ z( ?5 r
Using BJT Capacitance Equations ........................................................ 4-36
+ A' J. _' W( A: ZUsing Base-Emitter Capacitance Equations ................................... 4-365 Y, D8 Y- s5 ~+ }5 x- s) {" {
Determining Base Collector Capacitance ....................................... 4-38
1 @' }9 a% o: o3 l% L' TUsing Substrate Capacitance ........................................................... 4-40
9 _- {% b' C% Q& {Defining BJT Noise Equations ............................................................. 4-420 y8 F/ l2 |4 S
BJT Temperature Compensation Equations ......................................... 4-44! J# b% T! t" r% t
Using Energy Gap Temperature Equations .................................... 4-447 G9 w0 Q2 U" C* c5 m0 R# `
Saturation and Beta Temperature Equations, TLEV=0 or 2 ........... 4-44
9 f9 `6 e+ H n9 g, {& C) l4 XUsing Saturation and Temperature Equations, TLEV=1 ................ 4-46! I9 k% y# d5 |1 Y* M7 b0 J
Using Saturation Temperature Equations, TLEV=3 ....................... 4-475 p0 q: @! d( Y
Using Capacitance Temperature Equations .................................... 4-49+ G+ B4 h$ K5 X$ H" u4 M
Parasitic Resistor Temperature Equations ...................................... 4-516 S4 e' q- g; c" E
Using BJT Level=2 Temperature Equations .................................. 4-52" [8 L: \( L" q2 O; d
BJT Quasi-Saturation Model ................................................................ 4-53. e( @1 _: P/ [5 i- {' x3 W8 l
Using Epitaxial Current Source Iepi ............................................... 4-55
0 O4 k* r0 C3 z: v9 IEpitaxial Charge Storage Elements Ci and Cx ............................... 4-55
4 V) \& ^ x8 RConverting National Semiconductor Models ........................................ 4-583 t, c8 m2 w( R! E, r
VBIC Bipolar Transistor Model ........................................................... 4-60
( E k: S& F; ^1 t( E* pUnderstanding the History of VBIC ............................................... 4-60
7 C. ^: [+ s; N+ w5 K$ v' u# e' @VBIC Parameters ............................................................................ 4-61
+ t o: U; v9 [, R8 v$ N- h! SNoise Analysis ................................................................................ 4-62
, F- f3 G2 O0 {2 \: g4 `Level 6 Philips Bipolar Model (MEXTRAM Level 503) ..................... 4-71
( q4 f. ~" ]) t1 v/ O% NLevel 6 Element Syntax .................................................................. 4-71* h" t2 \/ P( h
Level 6 Model Parameters .............................................................. 4-72
& W: p y: j3 J0 F, jLevel 6 Philips Bipolar Model (MEXTRAM Level 504) ..................... 4-78; t: Y1 X' c7 ?
Notes ............................................................................................... 4-79
! s) @% d/ m7 `8 yLevel 6 Model Parameters (504) ..................................................... 4-80
9 G S& k. K! E3 l, m# F/ _. [Level 8 HiCUM Model ......................................................................... 4-94 V V K9 P1 C
What is the HiCUM Model? ........................................................... 4-948 y ^! q5 j2 G% c0 ` S! m; C
HiCUM Model Advantages ............................................................ 4-941 L; l8 ~6 F5 r, F4 {' E
Avant! HiCUM Model vs. Public HiCUM Model .......................... 4-961 z7 z3 d- p9 y1 N& d/ @
Model Implementation .................................................................... 4-96
" Z t2 l! z6 k! H, j5 A& ]( eInternal Transistors ......................................................................... 4-97' o! {' k5 d# G6 C" ^9 X: ]
Level 9 VBIC99 Model ...................................................................... 4-110
: W8 c2 H/ `: {# _/ K6 \. A; XElement Syntax of BJT Level 9 .................................................... 4-110
/ w+ g5 R. u9 w" G+ ~& ZEffects of VBIC99 ........................................................................ 4-112
p8 W; E6 M6 X: v" T C( s8 BModel Implementation .................................................................. 4-112
5 C' |% }% ^! a& xExample ........................................................................................ 4-119
& d3 L( P6 c1 G2 n N! M3 Q( `VBIC99 Notes for HSPICE Users ................................................ 4-123
7 t4 O1 V$ u* k' D, |& q7 u9 fLevel 10 Phillips MODELLA Bipolar Model .................................... 4-1245 x! r- @5 @- H
Model Parameters ......................................................................... 4-124) U4 h1 W# j6 K `1 E, \& X- o' M
Equivalent Circuits ........................................................................ 4-129) y; u/ Z5 ]1 h ]
DC Operating Point Output .......................................................... 4-1316 U( f8 O3 c) B+ u9 g" k# n$ g
Model Equations ........................................................................... 4-132
G2 I+ b8 j% G5 [7 HTemperature Dependence of the Parameters ................................ 4-142) t# _8 ]1 d! E7 K" L# `6 `% z0 m, h
Level 11 UCSD HBT Model .............................................................. 4-146
5 T" ]( ^- f" _Using the UCSD HBT Model ....................................................... 4-146 c8 ^9 L( O: i
Description of Parameters ............................................................. 4-1470 r& e4 ~5 t5 p5 Q F! k4 L' }
Model Equations ........................................................................... 4-152
+ p6 m4 N. _3 y/ y! ]/ gEquivalent Circuit ......................................................................... 4-163
3 e- _7 t# H# Z+ M; N" gExample Avant! True-Hspice Model Statement ........................... 4-165
& G& l- X' c& ?+ i+ c) \1 w; GChapter 5 - Using JFET and MESFET Models............................................. 5-1
- g2 ~0 u* R8 Q: fUnderstanding JFETs .............................................................................. 5-2$ \ q6 I# f6 U, L3 L+ _; k! z! k# T
Specifying a Model ................................................................................. 5-3
( \. K: G5 I2 T7 x9 TUnderstanding the Capacitor Model ....................................................... 5-5
% F3 `2 N8 B* _ ` h NModel Applications ........................................................................... 5-5
( w& k) c1 Z/ v; X5 s0 I! P' KControl Options ................................................................................. 5-6
( _" b }5 o, a; g7 BJFET and MESFET Equivalent Circuits ................................................. 5-7
: h9 |% [+ T. n; E5 [3 j" ~8 L1 Z {Scaling ............................................................................................... 5-7; h- ^' f0 }: K- D' } h
Understanding JFET Current Convention ........................................ 5-7: b( A) M+ D6 X% D+ x+ O
JFET Equivalent Circuits .................................................................. 5-8
7 ~3 w3 H9 F( T) H; R6 {JFET and MESFET Model Statements ................................................. 5-13
# L7 ^/ ~5 m$ C+ LJFET and MESFET Model Parameters ........................................... 5-13" g; S2 h/ X: \- f( E7 @
Gate Diode DC Parameters ............................................................. 5-15
f2 v& m m. c6 j# MJFET and MESFET Capacitances ................................................... 5-25
& j7 [; Q9 z$ PCapacitance Comparison (CAPOP=1 and CAPOP=2) ................... 5-290 m' t# z0 s* [! g( X4 Y t
JFET and MESFET DC Equations ................................................. 5-317 v! n/ }* B# a/ S; c( S: L
JFET and MESFET Noise Models ....................................................... 5-35
K+ C$ F( X" f* T" V: S3 WNoise Parameters ........................................................................... 5-35
, v* v4 q w$ m6 z5 @3 R8 lNoise Equations .............................................................................. 5-359 S5 w* i) p( x& c4 D9 `$ \
Noise Summary Printout Definitions .............................................. 5-36
/ N: S* D9 S0 I! Z4 L3 \+ G7 b; s) @JFET and MESFET Temperature Equations ........................................ 5-37
2 x' @% J1 C( C( w" I. g* X7 X3 fTemperature Compensation Equations ........................................... 5-40. @. r" |8 `# c# L, ]* |( n! m
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发表于 2008-3-25 17:14
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thanks a lot ,very good materials
