新的 16.3 期盼中。。。。

edcn366_murphy

Cadence 站点 上的消息。。。。

$ u. q, m! |# N' x5 \% {6 UNew Allegro 16.5 Technology
" }- _7 o. `9 G5 h5 a5 B7 mOn May 23, 2011 Cadence will release the 16.5 version of its Allegro PCB and IC packaging technology, providing customers with new capabilities for a shorter, predictable, and convergent path to product creation. The latest Allegro technology will be available through flexible on-demand product configurations that offer cost-efficiency and scalability. Allegro 16.5 spans silicon, SoC, and system-level development and offers PCB designers benefits such as:

• Higher functional density with a constraint-driven flow for embedded components
• Fewer physical prototype iterations with concurrent team desig
• Faster timing closure with new PCB interconnect design planning technology
• n authoring
• More efficient low-power design with integrated power delivery network analysis
• A compliant and faster implementation path with package/board-aware SoC IP
• Smoother collaboration among global teams with new SiP distributed co-design
• Flexibility through “base plus options” configurations
  " W3 {* G& Y; R/ _

edcn366_murphy

16.5 都等 很多年了。。。 16.3 感觉不怎么样  不及 15.7 耐用 好用
; V/ f6 B. W& A4 M; f, S* D6 e
8 l1 w3 E' t" J  z机器跑不起 慢腾腾的感觉真的是不爽。。