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[Ansys仿真] Quamtum-SI DDR3 仿真分析简介

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发表于 2009-2-6 14:17 | 只看该作者 回帖奖励 |倒序浏览 |阅读模式

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Automated DDR3 Analysis / e- A4 v$ ^& b% }
Quantum-SI 2008.04 automates signal integrity and timing analysis of DDR3 interfaces.  Enhancements include new DDR3-specific waveform quality checks and modeling of dynamic timing behaviors (write and read-leveling).  Quantum-SI simplifies the process of perform pre- and post-route DDR3 design analysis,  allowing designers to quickly establish their design's operating timing and voltage margins.  / D' B/ }6 D) j
DDR3 Signal Integrity Enhancements
5 T# Y: f3 a2 e5 ~* YThe JEDEC DDR3 specification (JESD79-3A) defines a new waveform quality parameter, Time Beyond VAC, or TVAC.  This parameter defines the length of time a signal must spend beyond the AC thresholds in order for a transition to be considered valid.  This time is dependent on the slew rate of the signal at the receiver input.  % j8 F- A2 E8 S* [
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Ref: JESD79-3A, Page 162, Figure 101
Quantum-SI 2008.04 adds parameters the IBIS model that allow Quantum-SI to automatically determine whether TVAC requirements are being violated during waveform processing.  Violations are automatically flagged and included in the Waveform and Timing report.  Violations may also be annotated directly onto waveforms in the SiViewer simulation results display.
DDR3 Timing Analysis Enhancements! v* r; u$ A2 Q' H# ]) g1 [
Quantum-SI 2008.04 supports two different types of timing models for DDR3 controllers:
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  • Programmable timing models allow the user to directly control timing between CK and DQ/DQS on a per-lane basis.  These models are used to represent controllers that do not implement training sequences and do not perform automatic write-leveling.  The timing model in Quantum-SI is set up with the same tap offsets programmed in the actual system, and Quantum-SI performs integrated signal integrity and timing analysis to predict the system's operating margins.' m0 U6 G7 D4 |/ ]$ a, `
      
  • Dynamic timing models are used for controllers that support automatic write leveling.  The timing model describes the controller's ability to adjust its output timing, listing minimum / maximum adjustments and tap resolution.  Quantum-SI combines this information with the results of SI simulations to determine the design's optimal design margins (based on infinite tap resolution) and actual design margins (based on the controller's actual capabilities and tap resolution).  Quantum-SI also predicts which tap settings the design will use during actual operation.   The resulting information is output in the Waveform and Timing report, as shown below.
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Users can utilize this new section of the Waveform and Timing report even if they aren't using a device with programmable output timing.  Quantum-SI always computes and displays the optimal timing shift for centering design margins, even when the driving device doesn't have adjustable output timing.  Designers can use this information to implement a timing shift using PCB etch to center design setup/hold margins.   Thus, this new report can be used to drive post-route timing adjustments for designs other than DDR3 interfaces.
DDR3 Design Kits
' N  N( q6 M4 i1 VArchitectural Design Kits are available for both registered and unbuffered DDR3 implementations. These kits are free to Quantum-SI users under maintenance and can be obtained through regular support channels.  Implementation kits are available for select controllers and memory configurations, and customized kits can be developed on demand. For more information on DDR3 Implementation kits, please contact your SiSoft Sales Representative.
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SiViewer Enhancements( S# B! z1 [' r6 C, _( U/ G
Waveform Violation Integration
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Waveform violations flagged by the Quantum-SI engine during waveform processing can now be annotated directly on the waveform display. Users can control which classes of violations are annotated under "Display Preferences / Violations". More information about a specific waveform violation can be obtained by positioning the cursor over one of the violation markers, which causes the violation details to be displayed in a pop-up window, as shown below: 8 R$ r: c8 ?# \8 r2 v( @3 m9 p; }
S-Parameter Display Improvements" ~6 f% L% W1 T

4 z2 L  E! Z! E$ X2 D0 DSiViewer can directly open S-parameter files and display the data.  The 2008.04 release includes numerous display and robustness improvements, including the ability to display results for sparsely populated S-parameter data sets.
! R' o1 J; ?; M) l: `0 r$ cEye Mask Library
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A library of standard eye masks is now included with SiViewer, which allows masks to be selected from a drop-down menu.  Users can quickly customize and add their own definitions to the eye mask library, which includes support for both simple and advanced compliance masks.1 l$ c4 j, f) E1 _0 h/ x
Split View in Eye and FFT Modes
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  _' s( z  X: {  U3 cEye diagram and Fast-Fourier Transform (FFT) display modes can now be displayed in a side-by-side format, in addition to displaying regular waveform data in a side-by-side format.+ }3 v. @# X! c/ E
Export Waveforms in .CSV format% ?( ]6 x( J7 E" ^; j! d

$ b& K  e, ~9 g% u: G+ t% \8 x  V% iData can now be exported from the waveform display to an external file in .CSV format.  This allows SiViewer to be used for cropping, scaling and shifting waveform data, then saving resulting waveforms to an external file, either for subsequent processing or for display at a later date.* [2 o* s) [7 F3 d2 M. k2 i/ _
Cadence Simulation Output (.sim) File Support  x1 ]/ S( E* g, S
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SiViewer now directly reads waveform output from Cadence Design Systems PCB SI tools (.sim files). This simplifies the process of comparing and correlating simulation results between tools.
' D) h3 [% M# N4 {. W1 Z+ l9 G0 N$ |Improved CAD support$ r% t0 S1 g9 ]% k4 k
Quantum-SI's integration with different CAD systems has been improved in the 2008.04 release. Split plane information is now imported from BoardStation and PADS databases (split plane import from Allegro was already supported). Quantum-SI produces a report that lists where traces cross various layout features (splits, other traces, via anti-pads). Post-layout simulations in Quantum-SI vary trace models based on changes in the cross-section along the length of the trace. 9 _5 d9 R, c/ q! z( ^5 K
Quantum-SI 2008.04 includes improved package import from Allegro.  Package designs using wire bonds can be linked into multi-board analysis setups and Quantum-SI will automatically create a simulation model for the wirebond from information in the Allegro database. 4 z: q2 `* }2 v! D; F
Panning in Schematic Editor6 Q0 p8 Z5 k, j1 G2 @
Continuous panning is now available in the schematic editor by holding down the middle mouse button.  This change makes Quantum-SI panning consistent with the way panning is performed in most other tools.  
+ x: e0 T! u/ w$ BUnified Installer, Updated Licensing$ V6 [; O3 q( _, Z1 X' I. V
The 2008.04 software installer includes Quantum-SI, standalone SiViewer and Quantum-Channel Designer.  The standalone version of SiViewer has been updated to use a Quantum-SI viewer license when no standalone SiViewer licenses are available.  This allows users with Quantum-SI 300 seats (which include multiple viewer licenses) to run SiViewer separately to view Quantum-SI results, view S-parameter data, or display HSPICE (.tr0) simulation results.
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2#
发表于 2009-10-20 22:25 | 只看该作者
哇 看来我又得好好补下英文了
为我国电子行业的兴起而奋斗!!!

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3#
发表于 2009-11-13 19:16 | 只看该作者
英文看不懂也。大仙翻譯下吧。

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4#
发表于 2010-8-30 22:11 | 只看该作者
这个有点难度啊

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5#
发表于 2010-9-2 20:02 | 只看该作者
看不到图片耶

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6#
发表于 2011-9-5 15:17 | 只看该作者
懂了也无用武之地! 无lic!!
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