DDR4 DQ 的 VOH_DC >= 1.1vddq ??

kobeismygod

为什么 DDR4 要求 DQ 的 VOH_DC >= 1.1*vddq？这个明显是达不到的嘛，那个大神可以解惑？

tiny丨Y

mark

超級狗

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8 _, T  j$ I6 p! d, \Output Driver DC Linearity
) A, \6 f2 S1 a4 yOutput linearity is not tested under system load conditions. The output driver's current is measured to the reference load in the data sheet. The output current is measured at defined V_OL/V_OH test points. V_OL(DC) and V_OH(DC) describe these reference points.
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Note:
# v2 Y& m( O4 n0 y" `V_OL(DC) and V_OH(DC) are not test conditions. Output current is measured at V_OL(DC) and V_OH(DC) test points for verification of output drive and linearity.
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kobeismygod

超級狗 发表于 2017-2-22 21:16
5 N3 M  n  c* n% i7 b5 kOutput Driver DC Linearity
/ D% F. u1 `8 f6 Y2 |% k& jOutput linearity is not tested under system load conditions. The output  ...

谢谢版主，这段我在镁光的一片文档里面也看到了，但是如果这个点纯粹是为了测试驱动电流或者说是输出阻抗，不是一个实际可以测得的值得话，为啥安捷伦示波器厂家会把这个当做VOH_DC测试的判决标准呢？在实际项目测试中不会pass的啊
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超級狗

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0 w- B/ J1 O% J; V' F- g1 v8 Z美光（Micron）的文檔還有這段話：

Defining System V_OL and V_OH
The SDRAM is not required to achieve the V_OL and V_OH values stated in the data sheet. Actual system V_OL and V_OH are determined by the output drive from SDRAM, coupled with the load being driven. System V_OL and V_OH are usage conditions, not DDR3 SDRAM specifications. Those values are determined by R_ONdrive and ODT or the load being driven.

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EDA-Q

哦？

futures3031

sodimm