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本帖最后由 pzt648485640 于 2013-11-19 08:22 编辑 / K; K0 ]: x5 j5 |9 g) l
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http://pan.baidu.com/share/link? ... 9&uk=2033524562) @; f4 i/ i: W, E9 X
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8 [& P. v' o" s3 x5 G( V! u- fDATE: 11-15-2013 HOTFIX VERSION: 019
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* t# Q. H7 t) P* g) u! w& R" DCCRID PRODUCT PRODUCTLEVEL2 TITLE
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. w6 ^+ w( h- u===================================================================================================================================6 {' v2 V3 @6 o% ~
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1176155 CONCEPT_HDL CORE Graphics remnants with 16.6 QIR 30 t, I% Z2 q6 s# O! T
2 ~( d, k- }( D3 c1178272 CONCEPT_HDL OTHER Verilog netlist does not include split blocks correctly3 H/ W' o. L' ?/ P% S5 N
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1190782 FSP FPGA_SUPPORT Support for Altera > 5SGXEA9N2F45 device.% j" |% q% L* s5 `
+ {( t( ?* R. t: T; E& A1194140 ADW LRM SYNC_PROPERTIES is not resolving issues a based sync_properties settings
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, @* W A% W4 c1195744 APD EDIT_ETCH Diff_Pair routing fails on certain Uvias in the pair.
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- h, { X' _! ~) [' l3 x1196704 ALLEGRO_EDITOR INTERFACES ENH: During ipc2581 export checkboxes corresponding to ¿Miscellaneous Image Layers¿ should automatically get selected
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1198340 ALLEGRO_EDITOR OTHER Multiple -product option on the Allegro command line does not access the second -product! _5 f" j' J+ e6 }) v
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1198596 ALLEGRO_EDITOR INTERFACES When copper thickness is increased for the outer layers, step Viewer does not show correct component position.2 {3 O! C. r* X/ u; Z2 v6 x
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1199673 PCB_LIBRARIAN OTHER Component Browser fails to load footrpints if they are set with UNC path
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2 C, Q. o% B5 p* j1199889 ALLEGRO_EDITOR DATABASE Allegro crashing with latest hotfix.
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1200303 ALLEGRO_EDITOR GRAPHICS 3D Viewer does not update after changing STEP model mapping% I, J6 Q" [+ n/ M
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1200449 ALLEGRO_EDITOR REPORTS Allegro crashes when generating Net Loop Report.% M) f' L1 Q+ |8 q
% j5 N' T* k$ ?: k1200915 ALLEGRO_EDITOR DATABASE Reducing accuracy of this specific design crashes Allegro
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) a# _3 e# r- l3 P. ~! w1201011 ADW COMPONENT_BROWSE Component Browser crashes in DB mode/ ~+ l# k% {) C, A1 J* |
- \0 N9 W$ r* p) @) a' K- R1201376 ALLEGRO_EDITOR INTERFACES Allegro hangs when trying to map a specific STEP model to a package drawing.
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1201897 SIP_LAYOUT IMPORT_DATA BGA Pin Colors not matching the Colors defined in the Symbol Spreadsheet after updating.
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1202709 ALLEGRO_EDITOR INTERFACES STEP File generated from Allegro is not overwritten when the variable "set ads_textrevs
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1 e. O/ s! Q' [! x1202820 ALLEGRO_EDITOR INTERFACES Different xml generation for same step model on S106 and S017) p# d: ]* x ~$ \
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1202842 ALLEGRO_EDITOR INTERFACES Step model invisible for one pin dra in allegro 16.6 symbol editor
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1202983 ALLEGRO_EDITOR SHAPE Shape voiding creates DRC with Route Keepout
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1203125 ALLEGRO_EDITOR OTHER Exporting STEP file with External copper enabled does not show all copper when viewed with Solid Edge or Inventor9 x6 v7 l7 K3 P5 o q8 P
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1203236 ALLEGRO_EDITOR INTERFACES IPC2581 output with crosshatched shape is not correct
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1203995 CONCEPT_HDL CHECKPLUS CheckPlus rule, local_signal_no_offpage_body, getting an incorrect failure.: G4 }0 Y/ ]7 g% K
& K9 E: V4 u: b" k# {- c% J+ k1204629 ALLEGRO_EDITOR SKILL axlUIDataBrowse crashes the editor or returns error( ~/ W9 W* ^+ l( @8 l" E
" c% I, Y' i! C1 A' H* p6 ]$ ]: L1204640 SIP_LAYOUT DIE_EDITOR Concurrent co-design update fails
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1204881 SIP_LAYOUT BGA_GENERATOR Pin numbers are messed up after deleting a pin at a staggered bga3 D/ O. e* c; F7 Y
$ [) D: B1 j1 O, _1 W1204885 CONCEPT_HDL CONSTRAINT_MGR Cant assign discrete models after the wrong model was removed.( O4 S+ P! b8 ]0 f0 F# U
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1205374 ALLEGRO_EDITOR OTHER pdf out command creates incorrect drill Symbol Characters placement in pdf file when setting film mirrored.
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+ a$ s5 v$ q: y& g* Z5 `1 S2 l1205729 SIP_LAYOUT DIE_EDITOR update of codesign db fails on exit from die editor0 a! C+ O4 {" ]( {* x9 r( [
' z6 Q7 P5 w' S# o6 \1205801 ALLEGRO_EDITOR OTHER Tool crash when do export IPF.* ^; U0 ^1 x+ i* W
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1205881 CONSTRAINT_MGR OTHER In CMGR , Objects > Create crashes Allegro
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发表于 2013-11-18 09:19
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