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换了nandflash后和加焊DDR后有两种状态，但是板子都没有启动成功，串口有打印。7 B+ P( ~% h+ E0 H* b8 Y4 V/ X# @
以下是状态1的log:
8 E; B5 [9 I* j4 B, O8 G% z) b4 qSoC preloader 1.0.0.r1422.lzma (Wed Nov 13 14:32:57 CST 2013)
" \' g J, F/ C2 [! H* E# CII: Stack @ 0x9fc1fd18 (parameter 736B)2 D+ w& X, P, v% A& C; k
II: Console... OK
3 j) a1 X2 F/ N) ]Setting DTR
4 c9 n) C' H J/ ~II: DRAM is set by software calibration... PASSED) g; s4 ^' d" j; I" t/ X
7 Q" W/ ]6 x* \8 Q
DDRKODL(0xb800021c):0x000004104 U# K/ U# P6 t0 `8 ^
MCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f4 R+ |; |3 R: @. I% m3 d; s
DTR2(0xb8001010):0x0630d000
. Q9 r. L* E1 p: B6 I7 e0 [PHY Registers(0xb8001500):6 E/ z% i/ _4 M1 ~- L
0xb8001500:0x80000010, 0x0000007f, 0xa1a00000, 0xfdffffff
+ c& U+ T, T! ?- f: q0xb8001510:0x00140a00, 0x00180c00, 0x00140a00, 0x00180c00- f6 t. }4 c( |/ j5 p+ B. `0 d/ f
0xb8001520:0x001a0d00, 0x00140a00, 0x00160b00, 0x001209006 l/ z3 W* p7 A/ q3 x+ X' G
0xb8001530:0x001c0e00, 0x001e0f00, 0x001c0e00, 0x001e0f00+ n8 |' f1 s0 c; U" T* }
0xb8001540:0x001e0f00, 0x001a0d00, 0x001c0e00, 0x001a0d00! L" b. ]. A' H! Z1 }) B
0xb8001550:0x00100800, 0x00140a00, 0x00100800, 0x00140a00- o0 S: w0 T" p6 Y3 V
0xb8001560:0x00160b00, 0x00120900, 0x00140a00, 0x00100800
) V* U1 F; e& d: z$ i# y0xb8001570:0x001a0d00, 0x001a0d00, 0x00180c00, 0x001c0e00
6 {8 W2 h) ]7 f4 O8 N0xb8001580:0x001c0e00, 0x00180c00, 0x001a0d00, 0x00180c008 |& O6 k- a; [
0xb8001590:0x00000000, 0x5110dbd9, 0xa9a95656, 0x5352b5b5
2 t" h' r- G& E0 u: Z8 |7 q- Y6 W0xb80015a0:0x4145dcdc, 0x00000000, 0x00000000, 0x000000002 N$ q! N3 L, G; m
II: PLL is set by SW... OK$ l4 W/ _# h, o
II: Flash... OK
4 ^; F# |1 \, u, d" ^, {% y) L3 ZII: Stack @ 0x801ffff87 Z2 L- W# W1 ]' S F/ ^8 r6 H7 {% @
II: Starting U-Boot...
4 \: j o0 O% ~" t5 M* U$ ]) h& FII: Inflating U-Boot (0x80000040 -> 0x87c00000)...
- H( j: J2 o5 k$ W) F' V/ |EE: decompress failed: 1/ `) r9 H" v- {% y4 I
以下是状态2板了log:
# E4 x8 ^1 U& y8 `" `SoC preloader 1.0.0.r1422.lzma (Wed Nov 13 14:32:57 CST 2013) x ~4 X7 E4 h; d
II: Stack @ 0x9fc1fd18 (parameter 736B)
1 ~# f4 D/ A6 U. {4 oII: Console... OK
) `8 G3 S5 i. ~Setting DTR
* c( M' q! l& w# _II: DRAM is set by software calibration... PASSED1 [" q: K2 b0 S; A: A' s
# |5 s, I$ V" A7 J; P+ }DDRKODL(0xb800021c):0x00000410
* ~9 a" h" o0 V4 D- @MCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f6 R( O! I2 Y: C, s6 Z- u0 x. K
DTR2(0xb8001010):0x0630d000
2 N* |% z, p! s* @- [PHY Registers(0xb8001500): F/ B- N) {. b& m; o' L
0xb8001500:0x80000010, 0x0000007f, 0xa1a00000, 0xffffffff
; |8 M. r* a" D" v+ f( r+ h0xb8001510:0x00120900, 0x00140a00, 0x00120900, 0x00160b00
2 Z1 I5 e, D- x) ]! S$ h9 |0xb8001520:0x00140a00, 0x00120900, 0x00140a00, 0x00100800
: p$ X! C9 n ?# [7 o* X( K% l0xb8001530:0x00180c00, 0x001a0d00, 0x00180c00, 0x001a0d00; D# f8 A0 s! h6 n2 A
0xb8001540:0x001a0d00, 0x00180c00, 0x001a0d00, 0x00180c004 a( r R. E2 V& ]% \ E
0xb8001550:0x00120900, 0x00160b00, 0x00120900, 0x00140a00
! C% E" Z# q0 d" e9 D0xb8001560:0x00140a00, 0x00140a00, 0x00120900, 0x001008002 r Z: T: u( d; r- A. C% a
0xb8001570:0x001c0e00, 0x001c0e00, 0x00180c00, 0x001c0e00) W3 d9 O0 s8 K' v1 _! o8 l. ` Y! H
0xb8001580:0x001a0d00, 0x00180c00, 0x001a0d00, 0x00180c00
* L4 D3 J$ h \4 |9 C0 X0 [0xb8001590:0x00000000, 0x5adad2d2, 0x24207574, 0x5a5adada; D+ S' i* ]+ M
0xb80015a0:0x8d0da7a5, 0x00000000, 0x00000000, 0x00000000
3 {- _1 Q0 H5 G R* L3 R: |II: PLL is set by SW... OK' S, ^, N/ b# x2 _
II: Flash... OK) s' y% W: Q! s8 Y0 J; O, o1 ?0 r
II: Stack @ 0x801ffff8- I" w+ R# Q, ^# p5 ~' o7 p
II: Starting U-Boot...$ \9 ? b% @8 ~9 c, v d
II: Inflating U-Boot (0x80000040 -> 0x87c00000)... OK
( @) f5 V C4 q* dII: Starting U-Boot... 3 A. @; r4 j8 E2 c# a# h0 O3 u' W; ^' R
6 \, v4 s0 @9 f; g
& s* q5 R/ a' Q. Y( y( m& S& } l
U-Boot 2011.12.NA (Nov 13 2013 - 14:33:03)
& U: }& T. H6 a# x
% D- `9 e5 E- L6 o5 K* uBoard: LUNA
/ d( P2 O$ }# {9 A HCPU: RLX5281 600.00 MHz, DSP: RLX5181 500.00 MHz, , DDR3 300MHz, LX:200.00 MHz
: T5 R- _/ @1 @DRAM: 128 MB; t4 o$ `1 _* b
enter nand_init
/ j' d" c' i0 |board_nand_init(). a$ O, n2 t; { y/ }$ \$ S
parameters at 0x00001212% Y% y# I) g& M @
parameters.read at 0x9fc00550
- Y1 G! Y/ g1 I% |parameters.write at 0x9fc03308
6 h) Y! `1 z- C( Pparameters.bbt at 0x9fc1feac- ?" w2 g( _( @( a
uboot- read nand flash info from SRAM
5 n4 w8 F3 W( M; n8 cflash_info list- a3 {) u9 m' V) B
flash_info.num_block : 1024
2 D- l5 F" N# l x, Pflash_info.num_page_per_block : 64
* D1 y+ Q# O8 N/ h( Xflash_info.page_per_chunk : 1
% g( i8 w) U! B2 z, Tflash_info.bbi_dma_offset : 2000
& j2 O/ v2 k; S" @flash_info.bbi_raw_offset : 2048
2 i4 E1 i; _( y2 a6 k. fflash_info.bbi_swap_offset : 234 @7 |2 i" e5 o, Y1 a/ Z
flash_info.page_size : 2048
4 w% \, |( ~% G9 K. J4 {chunk size : 20487 @! T8 K7 ]1 m8 O5 V
flash_info.addr_cycles : 4$ L- p' c" W% |* x1 O' A3 V, O* q
pblr_start_block : 11 c2 U' F6 r) @+ [
num_pblr_block : 3
' ?6 N7 S3 A Fparameters.curr_ver is a
* Z/ X( r: o( N0 s7 fparameters.plr_num_chunk is 29( ^. D+ ^* y% ~, R& `8 T' X
parameters.blr_num_chunk is 451 x0 } R9 K9 d
parameters.end_pblr_block is 4
7 \9 Y' `' h- o7 Y. Y, E: Wrtk_nand_read_id id_chain is 9580f192
, c' A( L4 z; C9 @. P- [nand: Manufacture ID=0x92, Chip ID=0xf1, 3thID=0x80, 4thID=0x95, 5thID=0x40, 6thID=0xc0
$ y6 o4 K* W6 }this->pagemask is 65535
1 T, g' x6 h M2 |7 x# y! T) A* F+ h+ fthis->chip_shift is 27& L" Z% q H/ g+ y0 i1 b' e
parameters.bbt_valid is 1, F+ r( N# ]3 T7 J: Q( G
create_logical_skip_bbt. }: H; }; w3 ?( ~! F( B
last skip_block 1024
3 A" x4 Q. `& F0 i7 X9 T7 onand.c nand_init_chip mtd size is 877bfeac1 }) w+ e* z4 i' y9 h
128 MiB
" {4 x2 k1 k- r' M b7 ?Loading 131072B env. variables from offset 0xc0000/ W; y6 k x/ N8 ~, M) `. k2 L
Unknown command 'sf' - try 'help'6 h8 x; N! h* T9 }! L
Net: LUNA GMAC + u I$ Z! g5 h4 u" J
Warning: eth device name has a space!; D$ x( V; N- x6 M
3 C$ T: Y; a# M( B& R Y$ f% N
Hit space key to stop autoboot: 0
1 q v1 ], O2 J% h/ a
1 W, O0 J' t7 u" V: |& V% w- }; \9 R' e. G2 Y( S0 H# F
ACTIVE IMAGE 0 (tryactive=2 sw_commit=0)% l" ^: B7 h2 ^4 i; U9 d
) ?7 w2 P5 w- q* `) ?reset pcie0" h( i* ^) f0 u O( D: F- K- q z
reset pcie1
' m4 ]2 H" j+ P. G! v z: z9 |) b3 [
( |- l' K( j. oNAND read: device 0 offset 0x100000, size 0x380000) r/ ^. f2 ^# T. T$ R& t( ~% Z
3670016 bytes read: OK
- w: `/ Z: y8 v! p# W## Booting kernel from Legacy Image at 82000000 ... r h% W, ?7 c. f
Image Name: Linux-2.6.308 S' p# m) s( `1 z4 Q
Created: 2013-11-14 2:56:37 UTC
k* }3 _8 x7 L z7 w4 E0 M Image Type: MIPS Linux Kernel Image (lzma compressed)
/ X( O* v0 R6 V/ J Data Size: 1791872 Bytes = 1.7 MB" `8 d0 I* }) m+ j
Load Address: 80000000
: K0 p, T8 d% w: w) e Entry Point: 800000000 j# _2 ?4 k0 V1 z
Verifying Checksum ... Bad Data CRC
" p6 }* e8 }2 }, g8 P' AERROR: can't get kernel image!
s8 m J( c7 k$ Z/ v5VT-2510#
2 k ~7 K; S0 V) ~( m3 u3 c1 c请问大家这是什么问题呢？ |
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发表于 2013-11-28 17:40
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