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/ @) Z" d8 m/ ~" X+ L2 I) y6 dCadence16.5 Hotfix_SPB16.50.048_wint_1of1
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. X$ @) K' y9 d) r' b5 khttp://115.238.233.103/file/MDAw ... k&mode=download
. f, v" ~! H' ~Hotfix中只需要安装最新的版本即可。& |+ a3 a4 N' v- @4 F' }
DATE: 10-4-2013 HOTFIX VERSION: 048
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, i/ _+ X" O) I7 \=================================================================================================================================== e) v( U5 S1 E8 l" [, a# V
1143902 ALLEGRO_EDITOR DATABASE when the shape is rotated 45 degreesthe void is moved.0 u$ f2 z( H& S( ^
1145286 CONCEPT_HDL CORE Directiverequired for switching off the console
3 A, z2 P4 E# G1175307 CONSTRAINT_MGR ANALYSIS CMGR fails to report RPD DRC foraccuracy 4 - mm
9 a9 C- w* _& q# z1177714 CONCEPT_HDL RF_LAYOUT_DRIVEN RF component's LOCATION property can not be set toinvisible a# U% n3 D$ A* Y% |
1178180 CONCEPT_HDL CONSTRAINT_MGR The"hier_write -forceset" deletes all existing constraints in CM ^6 K! v: V% S9 ~1 s) a7 R
1184178 CONCEPT_HDL CONSTRAINT_MGR Ecset xnetmembers lost from electrical class when restore from definition of subblocks
0 e$ ^, u. T# n6 c4 o1 i) _1184682 CONCEPT_HDL CONSTRAINT_MGR Net Constraintnot transferring to layout from schematic% Y4 C& @7 U) d+ j% L# f" o- L! p
1186152 ADW LRM Part Status forDeleted Part in LRM is distinguished with other part status
, `+ Z o3 Z9 d% r$ n1187196 CONCEPT_HDL CORE TOC notpopulating (page 1)! I8 z) P* S7 |( m q9 ^
1187667 F2B PACKAGERXL Existing hardLOCATION property in drawing was left unchanged
. ]. Q G" N2 }: J& G, F% J1190144 ALLEGRO_EDITOR OTHER Fillet shape is not genrated aroundcline
" ^4 e: f2 d5 d: x- i, \1190618 ALLEGRO_EDITOR GRAPHICS Enhancement for Visible grid
D$ c- q) @, \' s+ X! A1190927 CONCEPT_HDL CORE Check sheet doesnot report shorted signal/power nets if power symbol is connected to a pin
+ F; N0 G5 ^& A' A& r5 W1191008 CONCEPT_HDL CORE Remove BinaryFile feature doesn't work |
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发表于 2013-10-29 17:15
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