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![]() PCB Designer's SI GUIDETable of Content
) Z0 S) Y' d( X- \( b% r4 zBasics of SI___________________________________________________________________5 & h: J# ~ H" ?. t* O4 d
1.1 When Speed is important? _____________________________________________5 B! Y: P& u1 G, r) T9 |) T
1.1.1 Acceptable Voltage and timing values ________________________________5
1 W. p( C: K% K: d3 ~6 K% e/ w2 C* R1.2 Signal Integrity ______________________________________________________5 8 f0 R0 z. B$ u; J1 c
1.2.1 Waveform Voltage Accuracy _______________________________________5
$ j N: d% y; D1.2.2 Timing_________________________________________________________5
0 y$ J0 B: U' ]5 _1.3 Speed of currently used logic families ____________________________________5 1 F+ n/ { T+ F9 G6 E
1.3.1 Transition Electrical Length (TEL) __________________________________6 - X) n( L/ L% H1 P7 Y' [
1.3.2 Critical length ___________________________________________________6 6 z% q5 u9 Q1 \" f
1.3.3 What is Transmission Line? ________________________________________6
6 }( k( l& k. l8 t8 J' j/ e1.3.4 What is moving in a Transmission line?_______________________________6 , C1 p9 I- ^/ [1 H F
1.3.5 Power Plane Definition____________________________________________6 * A% o' m! v3 V" z1 R
1.3.6 The concept of Ground ____________________________________________7 ' Z$ L0 R* S( |# x- o
1.4 STRIPLINE circuit with Electromagnetic field _____________________________7
6 A9 Z) k) G4 ?: C) M# P" B1.5 RLC Transmission Line Model _________________________________________8 / d1 n4 [* b" n9 D
1.5.1 What is Impedance? ______________________________________________8 , ?- y, k+ x! j) V8 q" J% O( T
1.5.2 A Practical impedance equation for microstrip _________________________8
( W3 k7 W8 l& w6 E ~) h2 H' v1.5.3 What is relative dielectric constant Er? _______________________________9
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2 Interconnections for High Speed Digital Circuits _______________________________10
e& L& W$ s% K7 L7 v8 Q+ Z( r2.1.1 Summary______________________________________________________10 ( b5 A1 l/ z& e4 I& e }( J
2.2 Examples of dynamic interfacing problems _______________________________10
# c$ _- w1 {# B2.3 IC Technology and Signal Integrity _____________________________________12 $ ?6 T' U! j. X6 q) |$ s' Z0 r
2.4 Speed and distance __________________________________________________14
# y! E1 F9 ~4 f3 M4 W2.5 Digital signals: Static interfacing _______________________________________15 ' D% D9 k. r: v/ }) N; ?
2.6 Digital signals: Dynamic interfacing ____________________________________16
# u! t( V! e8 B4 ?. I& v' Q2.7 Review questions ___________________________________________________18
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+ l( d2 y! U; [3 Interconnection Models____________________________________________________20 3 T' }+ ]4 \: `2 r+ E+ L
3.1 Summary__________________________________________________________20 . s# j1 A4 i+ B% u3 u: |) t
3.2 Reference model for interconnection analysis _____________________________20 1 p/ G5 Z: J9 i! f6 r
3.3 Receiver model_____________________________________________________21
' x% j) ?3 f# p9 f' ?& f5 p3.4 RC interconnection model ____________________________________________23
! H( X; d, `1 f/ R3.5 Parameters of the interconnection ______________________________________25 - @& n% V8 t! q0 O9 x) Y
3.6 Refined models _____________________________________________________26 ( k' T6 W& U# ~7 J2 z
3.7 Review question ____________________________________________________28 5 f% \2 R0 O! O4 n8 a* H* Z3 F; K
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4 Transmission Line Models _________________________________________________31 ' r3 L8 X3 Y* p* m0 ]. F h- L6 r
4.1 Summary__________________________________________________________31
' v7 [3 o5 J1 n% L8 p; }3 A- c4.2 Transmission line models _____________________________________________31 # B% T' H0 R, ~8 K( F3 O; n( o
4.3 Loss-less transmission lines ___________________________________________32 ( F" T+ c$ L* I0 H% @1 s) Q
4.4 Critical Length _____________________________________________________34 / F# J) H7 ` r* S3 {( }
4.5 Reference transmission line model______________________________________35 6 h! ^* w& m0 ?
4.6 Line driving _______________________________________________________36 $ L! b2 N% \9 h5 A
4.7 Propagation and reflected waves _______________________________________37 # U( [5 C% R' k
4.8 A sample system____________________________________________________39 1 I% f4 U( u7 M5 M* L# x7 P4 M7 B
4.9 Review questions ___________________________________________________42
$ @, ^; r9 ?/ \; I- SPCB Designer’s SI Guide Page 2 Venkata 4 [1 g. I( U6 B
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5 Analysis techniques _______________________________________________________45
T- q4 X, S6 I# [5.1 Summary__________________________________________________________45
5 F7 S# k7 y/ T2 [3 v5.2 Transmission time and skew___________________________________________45 : {, n( S; a) D8 E9 }
5.3 Effects of termination resistance _______________________________________46
5 I+ T l+ d8 s& S+ e5.4 Lattice diagram _____________________________________________________48
3 Q/ C9 ~* a7 {6 d* A5.5 Examples of Real Lines ______________________________________________49
% v3 f P# c, Y* v) g& ^+ j- {5.6 Simulation code ____________________________________________________51 * z, D/ f) K# ^6 g+ K: _
5.7 Examples of results__________________________________________________54 & q) w2 B% i: E, A- `1 s5 j
5.8 Review questions ___________________________________________________55
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" y( u; x6 m1 y6 Design guide for interconnection ____________________________________________57 & u& O' p# T$ x: }; r, I9 O
6.1 Summary__________________________________________________________57 : l4 H6 B$ G( I) o# ^
6.2 Incident wave switching ______________________________________________57 # m" I* Q' d, U2 l W
6.3 Effects of capacitive loading __________________________________________58 " z3 t4 m M- {) ^
6.4 Termination circuits _________________________________________________59 2 ^/ [. Q1 P' _- A4 C1 U# L
6.4.1 Passive termination______________________________________________60 # }1 O7 ~( k! |5 Y
6.4.2 Low power termination___________________________________________61 2 T4 B3 R# u$ w5 \
6.4.3 Active low power termination circuit. _______________________________61
+ _; l- Y( j* e6 }6.5 Driving point-to-point lines ___________________________________________62
' Y! v; H7 u$ D8 G7 r$ W$ C1 l6 ?6.6 Driving bused lines __________________________________________________64
% Z$ s: j5 a5 l# W/ o, t6.7 Design guidelines ___________________________________________________67 & R0 G* |5 k" ]1 ?# c
6.8 Review questions ___________________________________________________67 | 
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发表于 2008-5-26 11:07
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