[仿真讨论] 《高速设计之数字技术》PDF高清原版分享！

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本书简介：
/ J& d" x3 I1 e+ o; k1 Q# THandbook of Digital Techniques for High-Speed Design ! \. X* X+ p3 q/ l

/ y+ F0 L" H+ Q) J2 Z3 zA must one for anyone who interested in the latest High-Speed Design technologies!
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Handbook of Digital Techniques for High-Speed Design : Design Examples, Signaling and Memory Technologies, Fiber Optics, Modeling, and Simulation to Ensure Signal Integrity/ {" }- c- K2 J- ]! l
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6 G$ s+ y2 J" b' ]* G, d) J4 F0 NBook Description5 Z: ?7 H( x# \
The start-to-finish guide for engineers designing high-speed digital circuit boards and systems using today's common EDA tools. ) [3 O0 m7 f- e
Provides detailed technical information on high-speed device families, applications and over 30 EDA tools that other books omit. % R/ i4 v  @1 @3 ~7 U
Engineers will benefit by developing a robust skillset and having a desk-side design companion 24/7.
- I! L3 v. g  C3 U: i. ]; u" nEnd of chapter exercises allow readers to implement the knowledge and techniques learned in each section.6 K0 L: }6 S( j3 W* L. \" Z
This practical handbook fills in gaps that other textbooks on high-speed design don't discuss, covering every aspect of high-speed board-level digital design. Several design examples at high Gigabit per second data rates are presented. Discusses highest-speed logic and interface families of devices, relevant applications, and device speeds versus how far signals transmit with good signal integrity. A quick-reference overview of each device family is also provided. High-speed design rules are presented for both engineering design and printed circuit board layout. Emphasizes designing high-speed backplanes, driving cabling, bus architecture and topology. Discusses IBIS and SPICE modeling, simulations, design processes, and over 30 design automation tools. Quantifies signal integrity using jitter and bit error rate measurements, eye diagrams, time-domain reflectometry and transmission. Details high-speed transmission line and parasitic effects, cabling, connectors, single-ended/differential terminations, lab test equipment, and intellectual property. Dedicated chapter on fiber optics and when to use.
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( `% l* {! s5 Z- L% qTable of Contents6 P6 `+ u1 C% s( ?7 r4 k9 o

1 a5 ]! U; X& X$ u$ c  zPreface.
; j- P" K2 Q' B! ^I. INTRODUCTION. # n% S& b+ |4 D
1. Trends in High-Speed Design.
+ Z; _: J! n, H1 N  d0 B- S2. ASICs, Backplane Configurations, and SerDes Technology.
- ^- G* L! q! }. W3. A Few Basics on Signal Integrity.
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II. SIGNALING TECHNOLOGIES AND DEVICES. * t" C3 b+ U) f, K
4. Gunning Transceiver Logic (GTL, GTLP, GTL+, AGTL+). ( t) o: x1 K+ R8 f  i6 c% |
5. Low Voltage Differential Signaling (LVDS). : m4 Y7 m' z" I, {5 a7 u
6. Bus LVDS (BLVDS), LVDS Multipoint (LVDM), and Multipoint LVDS (M-LVDS). + p& h2 j( H& L- ]8 Y
7. High-Speed Transceiver Logic (HSTL) and Stub-Series Terminated Logic (SSTL).
6 P2 ?( Q6 I' B7 g8. Emitter Coupled Logic (ECL, PECL, LVPECL, ECLinPS Lite and Plus, SiGe, ECL Pro, GigaPro and GigaComm). ! r, `! A; l  r/ Z. i; ?0 T7 X3 x
9. Current-Mode Logic (CML).
1 `$ K3 R. _4 h" J0 s! i2 l% X10. FPGAs - 3.125 Gbps RocketIOs and HardCopy Devices.
6 L' F: d0 k: a( k, Y0 I. Y11. Fiber-Optic Components. 8 `; c4 z  t* N8 x
12. High-Speed Interconnects and Cabling.
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III. HIGH-SPEED MEMORY AND MEMORY INTERFACES.
* w/ h. A8 j3 V$ q8 m0 `- J13. Memory Device Overview and Memory Signaling Technologies.
5 K8 _! w+ C# k% ?14. Double Data Rate SDRAM (DDR, DDR2) and SPICE Simulation.
9 p3 G4 E/ ~. h; e15. GDDR3, ZBT, FCRAM, SigmaRAM, RLDRAM, DDR SRAM, Flash, FeRAM, and MRAM. ' A! \2 }& }4 {" L4 d3 o% t: O
16. Quad Data Rate (QDR, QDRII) SRAM.   d) b9 e; N: A7 D$ m
17. Direct Rambus DRAM (DRDRAM). 8 f& ~2 Q" w3 o) P$ K
18. Xtreme Data Rate (XDR) DRAM, FlexPhase and ODR.
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IV. MODELING, SIMULATION, AND EDA TOOLS.
6 g( H5 w5 H! J: j5 y0 m7 {19. Differential and Mixed-Mode S?Parameters. ; d$ K" x$ B5 r9 \
20. Time Domain Reflectometry (TDR), Time Domain Transmission (TDT), and VNAs.
3 q, I, Y. s- O+ _, |$ a  q" D21. Modeling with IBIS. 0 D4 O% n) ]  D" M; f
22. Mentor Graphics - EDA Tools for High-Speed Design, Simulation, Verification, and Layout.
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8 O; q1 P7 r# Z: r9 PV. DESIGN CONCEPTS AND EXAMPLES.
* ~! a( ^' [( e6 d$ _23. Advances in Design, Modeling, Simulation, and Measurement Validation of High-Performance Board-to-Board 5-to-10 Gbps Interconnects.
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Appendix 23A. Generalized N-Port, Mixed-Mode S-Parameters. ) v, A. b" x- w8 N* z) A# o8 l3 L- S
24. IBIS Modeling and Simulation of High-Speed Fiber-Optic Transceivers.
% a3 h% t# u7 q$ K8 |2 r9 z5 w25. Designing with LVDS. " }# q3 f2 L& Z. W1 j
26. Designing to 10 Gbps Using SerDes Transceivers, Serializers, and Deserializers.
* l! ]; W3 a/ s: L! ~27. WarpLink SerDes System Design Example. 8 x6 u% b) p# Z

% L5 Z/ h; G; X5 l3 J0 ~$ F  n* bVI. EMERGING PROTOCOLS AND TECHNOLOGIES.
, \, c$ W, v6 {3 H, a7 Y8 t* N* A28. Electrical Optical Circuit Board (EOCB). $ Q& L% K# b1 Z# w3 e! x0 T
29. RapidIO.
* o2 q6 o# l( x; r9 b' R% U& r30. PCI Express and ExpressCard. # Z0 x) J0 D/ g5 W5 ]

  N# N. @0 E$ e/ r9 A4 R8 JVII. LAB AND TEST INSTRUMENTATION.
  q# n" z" B, _31. Electrical and Optical Test Equipment. 3 b1 ]2 R% p+ b
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Acronyms. 9 G# t+ e% t- [+ f
References. 8 J+ e' F' ~2 w
About the Author. ; {* e0 Z# B  m/ @& T

! D& T$ o' j. S/ ^6 p  Q7 AEditorial Reviews0 T/ x9 \( I. F5 }/ B( h
High-speed digital design—Complete, current, and practical
+ L3 L9 }0 }+ D0 z; p, L0 f) ?+ gPracticing engineers who work with high-speed digital design know that a thorough, fully up-to-date resource is crucial for keeping pace with rapidly changing technologies. Senior and graduate-level engineering students need a similar resource, but with added introductory material and plenty of exercises. Only one book fills the need of both audiences—Handbook of Digital Techniques for High-Speed Design, by electronics expert Tom Granberg.4 g% o) @) W* Z3 `
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This practical handbook covers every aspect of board-level design, starting with the basics of design trends, SerDes and bus technologies, and signal integrity. In-depth topics include memory technologies, fiber optics, modeling and simulation, design tools and the design process, CML controlled-impedance drivers, differential and mixed-mode S-parameters, and the emerging protocols and technologies of RapidIO and PCI-Express. Tom Granberg also features major, detailed high-speed design examples—including a BLVDS SerDes design and a design with high gigabit-per-second serial links using WarpLink devices. This book
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Provides detailed technical information on CML, SSTL, GTL/GTL+/GTLP, LVDS, Bus LVDS, M-LVDS, LVDM, ECL, PECL, LVPECL, HSTL, and more—plus applications best suited for each; f' l6 c2 ?4 B# F3 M% O
Discusses IBIS and SPICE modeling and simulation, plus a full range of electronic design automation (EDA) tools+ m# [2 R, G5 M; d
Emphasizes backplane and bus design with detailed guidelines and design rules4 P) i5 B& N+ t! d$ w( U# p) r
Covers fiber optics in detail—and when it makes sense to use them, and much more!/ x, N/ _2 S) g( w. V7 U
This book was written with two audiences in mind—practicing engineers who work with high-speed digital electronics, and graduate and undergraduate-level students in colleges and universities who need to learn the concepts and techniques of high-speed digital design before going to work in industry.

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