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INI File Location:C:\Users\q8941\AppData\Roaming\SPB_Data\cdssetup\OrCAD_Capture/17.2.0/Capture.ini
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********************************************************************************
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* Design Rules Check, u4 I2 k9 H: ^0 |, x/ K' n: N8 v9 C
*
) P! N: F ?! m5 M. b2 {********************************************************************************5 X! F- d* n( h: ~: L* {
INFO(ORCAP-32002): Netlisting the design8 T" \. Y/ {2 e6 c& @1 g
INFO(ORCAP-32004): Design Name:- B& y- _4 x: g' y. u8 ]$ a
G:\W601-TOOL-R1.0.DSN: w/ O$ g1 P* g1 J' d
Netlist Directory:1 {: z0 P( o# ~
G:\allegro$ v1 y1 r, U( H c
Configuration File:9 f2 z# n8 z; Q: M0 P, f! O2 L
C:\Cadence\SPB_17.2\tools/capture/allegro.cfg- b/ _( S5 P p! ~
9 p" F8 p) x7 W" JSpawning... "C:\Cadence\SPB_17.2\tools\bin\pstswp.exe" -pst -d "G:\W601-TOOL-R1.0.DSN" -n "G:\allegro" -c "C:\Cadence\SPB_17.2\tools/capture/allegro.cfg" -v 3 -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision"
5 g) w G8 v$ m8 R! d. ~( w#1 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV13-C10_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV13-C10_10U".! Y: q5 X# Y( v' g" `
#2 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV14-C11_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV14-C11_10U".
+ v, Q: v; J9 [9 r. ?#3 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV15-C13_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV15-C13_10U".
4 |" d3 d) I b. T* B# S#4 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV16-C15_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV16-C15_10U".
B& T7 R# o/ r2 n# Y! U9 @#5 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV17-C16_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV17-C16_10U".# A# Q3 Y) X3 C/ t1 Y& A# u
#6 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV11-C7_4.7UF/25V" is renamed to "CAP NP_5_RES-0805-REV11-C7_4.7U".
% _) b4 B' O: m#7 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV12-C8_4.7UF/25V" is renamed to "CAP NP_5_RES-0805-REV12-C8_4.7U".
% }; o. ?2 I% N" K- ^#8 WARNING(ORCAP-36006): Part Name "LED_12_LED-3MM-D1_3Φ-LED" is renamed to "LED_12_LED-3MM-D1_3X-LED".
- D9 j8 W2 U! W! o#9 WARNING(ORCAP-36006): Part Name "LED_49_LED-ODN
9 D0 t9 N5 p3 L y( g/ v- k15112001NRG01-LCM1_ODN15112001NRG01" is renamed to "LED_49_LED-ODN15112001NRG01-LCM".
) z5 p4 t1 ?/ q ^: [- o" \#10 WARNING(ORCAP-36006): Part Name "LED_49_LED-ODN15112001NRG01-LCM2_ODN15112001NRG01" is renamed to "LED_49_LED-ODN15112001NRG01-L_1".
1 T( E, d. N3 d, U5 w' D#11 WARNING(ORCAP-36006): Part Name "LT1005/TO220_5_TRA-TO252-132-U2_AIC1735-50PE" is renamed to "LT1005/TO220_5_TRA-TO252-132-U2".
' O4 L( R4 E* @ i8 R& z+ v#12 WARNING(ORCAP-36006): Part Name "LT1005/TO220_6_TRA-SOT23-123-U3_AIC1734-33" is renamed to "LT1005/TO220_6_TRA-SOT23-123-U3"./ K6 j( W7 k: P- V+ a. _5 Z
INFO(ORCAP-36080): Scanning netlist files ...
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Loading... G:\allegro/pstchip.dat
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Loading... G:\allegro/pstchip.dat
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Loading... G:\allegro/pstxprt.dat. c- ^# d+ ^; b, f7 ^
# W" I- h, b+ `# b8 n' D ]Loading... G:\allegro/pstxnet.dat$ P, \7 y) ^5 Z* F+ y& N
packaging the design view...
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- A- \* ~- h5 H/ |. o- A! pExiting... "C:\Cadence\SPB_17.2\tools\bin\pstswp.exe" -pst -d "G:\W601-TOOL-R1.0.DSN" -n "G:\allegro" -c "C:\Cadence\SPB_17.2\tools/capture/allegro.cfg" -v 3 -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision"
3 a: R2 P/ D- ?8 wINFO(ORCAP-32005): *** Done ***
" d v( U, g: Z4 Y9 K********************************************************************************
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* Updating Allegro PCB Editor Board % X" q j3 F: ]2 T; }
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********************************************************************************
) c7 ^4 K( [8 w. P' s3 [+ jINFO(ORCAP-32040): Updating Allegro PCB Editor Board. c4 P3 m9 V& z
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% D$ ^( h$ t8 A1 T |Spawning... netrev.exe -y 1 -n -i "G:\allegro" "G:\allegro\W601-TOOL-R1.brd" "G:\allegro\W601-TOOL-R1.brd"
2 W9 K- W F* L8 s! q/ HReading File : G:/allegro/pstchip.dat ) ?/ T W9 D' R: y7 Q. s0 k& s
(00:00:00.04)
" \) v3 m3 T1 u' ^% i. x) ?Reading File : G:/allegro/pstxprt.dat
* t' B! p5 O/ r(00:00:00.00)1 p% j+ L& g( }: J, c8 d# L' \
Reading File : G:/allegro/pstxnet.dat
" o3 u; H; v# f" N5 L(00:00:00.00)
" m4 n6 [! d8 k% a2 jStarting to process component instances. T6 k4 t, t/ f# f; W8 Q- H
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netrev run on Oct 28 11:16:14 2016
7 _) d7 d3 E* s; J6 q& ~+ n7 ]! _ DESIGN NAME : 'W601-TOOL-R1'6 X4 O' Y+ f- w# E [4 z( T# n2 a
PACKAGING ON Mar 2 2016 00:37:248 E( m$ S- X, H, {
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& j. S/ @ P& c( p R4 @# k 2 errors detected1 H; D6 n# u- C
No oversight detected
: e" V' ^1 c+ Q2 e. j0 y* t No warning detected/ e' ~# C& R2 f' g) `/ k# v
0 U, G0 N- u/ S. [* y0 Ncpu time 0:00:18
* Z+ T. |; x" t% f; h6 u) T. P3 k* ?* Yelapsed time 0:00:00$ ^# |& ]1 D- K6 w: V$ g
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1 z3 E6 ~1 a# I) QExiting... netrev.exe -y 1 -n -i "G:\allegro" "G:\allegro\W601-TOOL-R1.brd" "G:\allegro\W601-TOOL-R1.brd"6 W- q/ R$ m2 y
(---------------------------------------------------------------------)& a# k! h7 }" M; W! e a
( )
: Y5 M; t* l- z% s( Allegro Netrev Import Logic )( A% L6 Q }8 J8 ? j, l
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( Drawing : W601-TOOL-R1.brd )
; @) c' x7 p) _( Software Version : 17.2S001 )& U. _0 n: X1 I5 B- m
( Date/Time : Fri Oct 28 11:16:14 2016 )
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# B) p3 }1 C$ F$ i" L9 u y(---------------------------------------------------------------------)
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7 S$ i& H$ h6 E% j% D/ r. ?------ Directives ------------7 j$ e7 F( x% ]; F; n; |( M% E
2 d3 _& j9 S k4 U! VRipup etch: No
! n! ^% T' Z/ I: r$ F3 HRipup delete first segment: No2 W/ N. _3 @' g6 t) k% e& r$ B. }4 `, V
Ripup retain bondwire: No
5 Z! L8 _% p* C* g2 K0 QRipup symbols: Always
( z$ o! [ A9 Q, ~. g2 N4 RMissing symbol has error: No/ k: @% n' V8 _* F. I; r5 b
DRC update: Yes# @0 ~2 P! p+ g! ~4 X' t& ], Q% Q
Schematic directory: 'G:\allegro'
; J! p u( n( \! y' N" PDesign Directory: 'G:/allegro'+ ^5 \. \. z5 E) y, K9 ]& R, b
Old design name: 'G:/allegro/W601-TOOL-R1.brd'
5 o! p* @: p3 m& N# O8 LNew design name: 'G:/allegro/W601-TOOL-R1.brd', v0 j% V5 C N" k# u1 f x
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CmdLine: netrev.exe -y 1 -n -i G:\allegro G:\allegro\W601-TOOL-R1.brd G:\allegro\W601-TOOL-R1.brd
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2 H5 a% @; z1 k% K# {( P5 F------ Preparing to read pst files ------
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( O! V2 p7 a; i ~Starting to read G:/allegro/pstchip.dat
, t+ F. }- w. o3 I H/ ^ Finished reading G:/allegro/pstchip.dat (00:00:00.04)& m: a) A! i+ s# B
Starting to read G:/allegro/pstxprt.dat
2 t+ E5 o [9 [! s& a/ I. b Finished reading G:/allegro/pstxprt.dat (00:00:00.00)& B- ^, w7 o# |( t
Starting to read G:/allegro/pstxnet.dat
& D5 n: P. a' M$ `, S Finished reading G:/allegro/pstxnet.dat (00:00:00.00). _+ W3 O0 w& c
8 ^+ N8 x9 v( `( N) t: e------ Oversights/Warnings/Errors ------% Z$ L5 a/ s1 W6 b: I+ i) U
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$ t; K/ ~# C' S/ {7 O#1 ERROR(SPMHNI-176): Device library error detected.: O: M5 {4 d* Y) @. W
' E+ N1 |$ i; B, pERROR(SPMHNI-190): Device problem 'LED_12_LED-3MM-D1_3X-LED'. Package property error: 'VALUE'='3Φ-LED'. Illegal character(s) present in the name or value../ [2 D7 I; z$ D- i, D/ v
' V7 v, @$ {4 ?% IERROR(SPMHNI-170): Device 'LED_12_LED-3MM-D1_3X-LED' has library errors. Unable to transfer to Allegro.8 g: n2 ^. n$ z6 |, Z; k8 r
+ t! s6 Q! R+ z2 I' g------ Library Paths ------8 x+ H) E7 n4 y4 w6 r+ S. X. [
MODULEPATH = .
: n' m' A1 ~$ `' T0 j. J C:/Cadence/SPB_17.2/share/local/pcb/modules : O1 ~! p: I$ C2 Q) W& b E
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PSMPATH = . 4 t8 Y: p( ?: w5 v/ {5 h6 y' m
symbols
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../symbols * i" g9 j6 m$ O; L* ]' j" a
C:/Cadence/SPB_17.2/share/local/pcb/symbols
4 {+ B1 @! L) n& N1 M6 J C:/Cadence/SPB_17.2/share/pcb/pcb_lib/symbols
3 D, K3 i6 K2 F5 x T C:/Cadence/SPB_17.2/share/pcb/allegrolib/symbols
5 P& ^" j, a9 m0 M2 W) M3 v3 b7 W: J9 c' _" J0 [' h( a6 x% o ]. w
PADPATH = . # P3 a# D% w7 {$ S( R7 b- v
symbols
7 A6 H& r, c, y; c ..
( h& f9 z6 W3 ^) B ../symbols 9 k2 t6 z7 s$ N- B- X1 P- q/ E
C:/Cadence/SPB_17.2/share/local/pcb/padstacks / N' p: }$ m- ~% A! a% n) Q; Z
C:/Cadence/SPB_17.2/share/pcb/pcb_lib/symbols
/ b# \; U1 T+ T$ `7 @; p( A C:/Cadence/SPB_17.2/share/pcb/allegrolib/symbols + l3 O4 l5 a1 @6 m9 ~/ n! P1 h8 v
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$ W$ z1 f g! N
------ Summary Statistics ------
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3 S+ N1 }, g: j7 H; x
#2 Run stopped because errors were detected
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netrev run on Oct 28 11:16:14 2016! j* M" X) J! S& c" G
DESIGN NAME : 'W601-TOOL-R1'
' k7 u+ d+ k A6 e PACKAGING ON Mar 2 2016 00:37:24
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COMPILE 'logic'
- {0 h8 G2 ^& }& o+ d8 a CHECK_PIN_NAMES OFF
T0 c! Z1 S9 u0 W0 E. a CROSS_REFERENCE OFF8 G# q5 m, F3 k/ I# p
FEEDBACK OFF4 r& {+ ?) ~7 e1 b: e
INCREMENTAL OFF; R2 I) {. q, C! F( H: J
INTERFACE_TYPE PHYSICAL! p( W) f6 Z4 I) I* x+ ?: M( l
MAX_ERRORS 500% h5 m" \0 H. Q% A4 W3 e
MERGE_MINIMUM 5
3 ~, G2 @0 C! {2 H ~3 [ NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'( U" \( a2 k% h/ k: }
NET_NAME_LENGTH 249 ]. m+ A9 I! \
OVERSIGHTS ON
2 b$ T4 \2 _% P: S% t REPLACE_CHECK OFF
5 g8 a7 Y+ p& w( r* U& s SINGLE_NODE_NETS ON
2 X& H: b5 x6 ^" B, H7 { SPLIT_MINIMUM 00 f0 A. d, T1 c
SUPPRESS 20* |2 y, J! V ?( B3 d
WARNINGS ON* o2 x3 J. X6 i- q) J% Q+ n
Y8 h1 ^" Y, q7 p; T 2 errors detected
# p: W. t* u* `1 i No oversight detected# K+ c% s; ^( c( w: [
No warning detected
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cpu time 0:00:18
( S" C2 D. i* V5 ?$ Lelapsed time 0:00:00
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INFO(ORCAP-32005): *** Done ***4 i0 G3 O0 J$ `# O0 Z( F
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发表于 2016-10-28 11:11
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