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本帖最后由 jacklee_47pn 于 2016-12-21 18:11 编辑 0 j1 v! b4 d! _* Q8 G0 c/ Q; Y2 ~
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來一個強悍的 PSoC® 4100 M-Series
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5 k/ ~( `+ [, @' Z" l7 p/ W32-bit MCU subsystem/ |* E% Q5 o3 V) \* Q0 H
24-MHz ARM® Cortex®-M0 CPU with a DMA controller and RTC 3 O8 S% ?" C6 z9 @" n7 ?1 ?# w! ~
Up to 128KB Flash and 16KB SRAM
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CapSense® with SmartSense™ Auto-tuning
/ _4 Q2 e3 ~* I2 i6 o v6 o Cypress Capacitive Sigma-Delta™ (CSD) controller
/ f0 W; N* E! n) p8 Y2 P7 \$ | CapSense supported on up to 55 pins
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$ }" I& @8 N/ w& @- w+ YProgrammable Analog Blocks
. f: |" a1 e Y3 \- g0 f q Two comparators (CMP)
O; U: |9 F& w% _6 V n$ c Four opamps, programmed as PGAs, CMPs, filters, etc.
3 I! J! |$ { [4 Y, A8 V, w7 ] One 12-bit, 1-Msps SAR1 ADC5 Q5 N! t* ^5 W2 w
Four IDACs2 (2x 8-bit, 2x 7-bit); B# X4 G( m& i0 p& i
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Programmable Digital Blocks
+ y8 @8 ` G% l1 _% Z Eight programmable 16-bit TCPWM3 blocks
( X+ Z+ }6 H8 i- U Four SCBs4 : I2C master or slave, SPI master or slave, or UART6 |+ X& b2 ~# J
5 `) n# l5 g, O$ H6 U' k& d. z4 ZPackages: 48-pin LQFP, 64-pin TQFP (0.8-mm pitch),64-pin TQFP (0.5-mm pitch), 68-pin QFN
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