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换了nandflash后和加焊DDR后有两种状态，但是板子都没有启动成功，串口有打印。* S8 { f: H# Y) F" I
以下是状态1的log:
0 L1 w. \, N K0 A# D2 \1 ~SoC preloader 1.0.0.r1422.lzma (Wed Nov 13 14:32:57 CST 2013)
, c' o* D7 y# m& tII: Stack @ 0x9fc1fd18 (parameter 736B)
- b' E/ k- X" N$ \2 { T- YII: Console... OK
( ?2 G2 A0 m+ S$ p9 JSetting DTR+ D, o* i2 }' ^$ _: C, C. F9 [
II: DRAM is set by software calibration... PASSED4 e& y1 d+ b! E
9 W9 f7 e( p; y1 c% }DDRKODL(0xb800021c):0x00000410
( j2 d. E/ Q9 }MCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f
' a2 M( J8 }/ u* l) @3 IDTR2(0xb8001010):0x0630d000
6 y3 M& K' n" \7 f# YPHY Registers(0xb8001500):& P, |: _! D8 M! o3 |/ | l
0xb8001500:0x80000010, 0x0000007f, 0xa1a00000, 0xfdffffff
5 x- z L1 O2 Z+ ~0xb8001510:0x00140a00, 0x00180c00, 0x00140a00, 0x00180c00
- n5 s4 z- _" x/ ?, f! x( V0xb8001520:0x001a0d00, 0x00140a00, 0x00160b00, 0x00120900
& y8 p5 @& ~7 l3 a: I6 E8 _0xb8001530:0x001c0e00, 0x001e0f00, 0x001c0e00, 0x001e0f00& Q1 o' h% ]; {+ O' ^. G+ _2 ?* X
0xb8001540:0x001e0f00, 0x001a0d00, 0x001c0e00, 0x001a0d002 }4 |. A/ j+ d' v" j
0xb8001550:0x00100800, 0x00140a00, 0x00100800, 0x00140a00
5 o' n+ T' u: i6 X4 H6 f0xb8001560:0x00160b00, 0x00120900, 0x00140a00, 0x00100800, G5 y" W( ?0 I0 j, V
0xb8001570:0x001a0d00, 0x001a0d00, 0x00180c00, 0x001c0e00- k( t4 |# d) s4 k- y
0xb8001580:0x001c0e00, 0x00180c00, 0x001a0d00, 0x00180c002 V- W% q/ E( j+ @% a/ f# M: R. M
0xb8001590:0x00000000, 0x5110dbd9, 0xa9a95656, 0x5352b5b5
- i, M6 b1 | t, v0xb80015a0:0x4145dcdc, 0x00000000, 0x00000000, 0x00000000
, a# T' f; B! R- {) @5 n; DII: PLL is set by SW... OK9 u! I; e! H7 C) h
II: Flash... OK
7 E8 V |# Q/ ^$ d. xII: Stack @ 0x801ffff8
, ^9 R9 ]4 G. y$ E* sII: Starting U-Boot...
/ ?- j8 f* y1 I6 F3 n5 PII: Inflating U-Boot (0x80000040 -> 0x87c00000)... 1 Y3 c9 q# V1 K3 N9 {; B
EE: decompress failed: 16 x7 h; ]1 D+ J# L
以下是状态2板了log:. a1 p% U7 f' i7 l9 |- u/ d9 o
SoC preloader 1.0.0.r1422.lzma (Wed Nov 13 14:32:57 CST 2013)0 l6 z9 y i' \* r! h5 u
II: Stack @ 0x9fc1fd18 (parameter 736B). a0 L; a! X& A
II: Console... OK
. [' u& j& \5 c7 `Setting DTR
4 R8 y. y1 R, O2 e4 w) B3 ?- I* AII: DRAM is set by software calibration... PASSED
8 G. t2 H) L# Y2 J
9 P q/ E. e. h8 v DDDRKODL(0xb800021c):0x00000410% v8 C+ Y5 o. _0 I! |
MCR (0xb8001000):0x22041de0, 0x21220000, 0x54433830, 0x0404030f' t M) K, i8 W( b1 {( p, |! K
DTR2(0xb8001010):0x0630d000
( R) b5 ` c4 a4 s0 M, n ?PHY Registers(0xb8001500):
7 ]! q8 h& s' t" _: I- l4 q0xb8001500:0x80000010, 0x0000007f, 0xa1a00000, 0xffffffff5 N) H! X- n3 c
0xb8001510:0x00120900, 0x00140a00, 0x00120900, 0x00160b007 o% @/ q9 }' C9 f
0xb8001520:0x00140a00, 0x00120900, 0x00140a00, 0x00100800
7 d. Q) C5 O) h0xb8001530:0x00180c00, 0x001a0d00, 0x00180c00, 0x001a0d005 E) h& m& j2 h: l) ?( L; _' B% S
0xb8001540:0x001a0d00, 0x00180c00, 0x001a0d00, 0x00180c00
2 _: p1 E7 s7 ^ g% n- s0xb8001550:0x00120900, 0x00160b00, 0x00120900, 0x00140a00- V( b& n8 D- `, x0 \
0xb8001560:0x00140a00, 0x00140a00, 0x00120900, 0x00100800 M5 s8 V+ i! z) ?# x& F# S J
0xb8001570:0x001c0e00, 0x001c0e00, 0x00180c00, 0x001c0e00
( M# d8 w( x& b* p0 h0xb8001580:0x001a0d00, 0x00180c00, 0x001a0d00, 0x00180c00
2 [% V5 W5 @0 k0xb8001590:0x00000000, 0x5adad2d2, 0x24207574, 0x5a5adada
9 t7 M) r Y6 {1 B0xb80015a0:0x8d0da7a5, 0x00000000, 0x00000000, 0x000000004 f: v, a7 m2 b$ p- R+ i
II: PLL is set by SW... OK* ? Z1 D. C) A3 \/ ]( j
II: Flash... OK% U# A7 o- a! `( O! D2 D
II: Stack @ 0x801ffff8
9 N) g& P+ J1 g; k5 zII: Starting U-Boot...
. k' n; a, R, gII: Inflating U-Boot (0x80000040 -> 0x87c00000)... OK
3 p- P+ U+ M+ v& t! c0 GII: Starting U-Boot...
7 h1 b- J( J! G: n
3 ~; S( d8 R& F( L( h4 A2 B. k6 g- O5 [6 i8 ^4 [3 A
U-Boot 2011.12.NA (Nov 13 2013 - 14:33:03)' y5 z! _+ b* }
- ]' }! J" Y2 [1 Y9 RBoard: LUNA! ] ^% C* u* \2 J! I3 A: E; [% s
CPU: RLX5281 600.00 MHz, DSP: RLX5181 500.00 MHz, , DDR3 300MHz, LX:200.00 MHz * {$ O7 s$ t, Q$ Z v
DRAM: 128 MB
+ c! F c# h1 r" Venter nand_init
$ g) R4 l- }+ S7 H* M% _board_nand_init()
& D p+ _& f! y% c3 P& b9 }8 s# Nparameters at 0x00001212
. h: _" L$ j% u# [; ]; ^parameters.read at 0x9fc00550% G. X% w6 s# X1 C. A
parameters.write at 0x9fc03308; t! H& h1 _5 H- w
parameters.bbt at 0x9fc1feac7 q) O4 T8 `6 p( g4 L$ H
uboot- read nand flash info from SRAM# f6 z" v+ v/ ^$ Q
flash_info list
6 P- a4 ]- M( H% X, O& o' G8 U! E6 Zflash_info.num_block : 10247 c/ W$ I$ @1 D- K7 _/ ?
flash_info.num_page_per_block : 64
* `$ p$ L1 l8 \! p0 \flash_info.page_per_chunk : 1
$ }- g4 @. S5 fflash_info.bbi_dma_offset : 2000
- K5 V @3 J/ vflash_info.bbi_raw_offset : 2048* Q' D. |; ?9 A! K/ Z- u
flash_info.bbi_swap_offset : 23
# v2 s( t+ c6 Z4 n; dflash_info.page_size : 20480 o! X# w( w) F S: W7 j0 B$ r
chunk size : 2048% h }3 F6 r: P4 W# i5 _
flash_info.addr_cycles : 4" i3 C d3 ~) x. C' j
pblr_start_block : 10 |8 z% B2 b5 a/ Y+ L; N& ?
num_pblr_block : 3
2 U8 t( ~* h4 ^, i5 }3 W J$ uparameters.curr_ver is a
7 _6 ^7 ^; ~3 R7 u7 O& ]- gparameters.plr_num_chunk is 29
4 c/ y9 U8 q. B! S7 Fparameters.blr_num_chunk is 45/ x, m6 Y8 j. {8 z8 @$ m O
parameters.end_pblr_block is 4
9 J4 h' O h) [ {rtk_nand_read_id id_chain is 9580f192+ N* l0 e- Y b' d0 T7 F u& D
nand: Manufacture ID=0x92, Chip ID=0xf1, 3thID=0x80, 4thID=0x95, 5thID=0x40, 6thID=0xc0
# j+ C5 B2 m. Kthis->pagemask is 65535
0 n$ ^* V/ J: H& F/ C( Athis->chip_shift is 27
d" L+ Y" E) vparameters.bbt_valid is 16 {5 Z: A) B7 ?
create_logical_skip_bbt4 X1 w+ J9 X# i0 a; Y( @
last skip_block 1024
' `4 H' n1 r8 B; knand.c nand_init_chip mtd size is 877bfeac
+ e. d! ]1 T$ m2 o; N5 S; e128 MiB5 P% q5 T7 a+ e. e8 O# |
Loading 131072B env. variables from offset 0xc0000& Z0 c' \) D( c. Y: p
Unknown command 'sf' - try 'help'
: l! N5 u8 B+ P$ g6 A2 ?' P5 r. ANet: LUNA GMAC
- H( H. d2 @ N# M: A4 P2 Y rWarning: eth device name has a space!/ |3 \; T' Q0 p6 v
; L: I" G. x- m3 c! l5 |- IHit space key to stop autoboot: 0
. Z+ i4 q; H; i" z# C2 A' G$ S6 D1 b, P
7 B5 o5 p" ^; }6 n. i. q
ACTIVE IMAGE 0 (tryactive=2 sw_commit=0)* d4 [8 I7 Q" b6 e/ V
1 M) }$ Z; d9 ?" J/ m" Z7 b4 q+ y! \. greset pcie0: O" g! H; K7 ?
reset pcie1( N, K1 S; @2 l$ F% I( K5 R
. \7 m: x: Q2 _: u9 F$ }
NAND read: device 0 offset 0x100000, size 0x380000 v% v& n5 E4 G0 O" E. i
3670016 bytes read: OK
$ w( k6 l5 r m1 c/ W/ N## Booting kernel from Legacy Image at 82000000 ...4 J U' f# q; M6 |2 |6 V. c4 i
Image Name: Linux-2.6.30
8 Y. Y; l; W6 m# `) Y& o0 ]4 V1 x Created: 2013-11-14 2:56:37 UTC
# r6 q9 V# U4 u5 V* ]6 F7 y3 t Image Type: MIPS Linux Kernel Image (lzma compressed)1 E! [- T, U' a8 \2 ~% r
Data Size: 1791872 Bytes = 1.7 MB
* x& K8 u% I; i Load Address: 800000009 M3 z. N, ^6 q1 D |. D9 E
Entry Point: 80000000- m/ S0 c, u, C7 L+ e& O
Verifying Checksum ... Bad Data CRC
, M; y5 K h. {2 w! b4 S( XERROR: can't get kernel image!+ T! t0 F1 L6 V- n
5VT-2510# , J" j- L" ?% A, w" i9 e! o
请问大家这是什么问题呢？ |
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发表于 2013-11-28 17:40
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