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INI File Location:C:\Users\q8941\AppData\Roaming\SPB_Data\cdssetup\OrCAD_Capture/17.2.0/Capture.ini- ~+ N6 a+ l5 h2 K
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********************************************************************************9 K( q7 }, E3 o' U
*
3 o3 G4 P- g$ j4 z1 q* j* Design Rules Check
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********************************************************************************
+ ^/ P% a+ z2 F/ i! _+ rINFO(ORCAP-32002): Netlisting the design
/ s8 j+ H6 o# G( @& l f' aINFO(ORCAP-32004): Design Name:
* m9 v+ A# T6 d0 ] M% G! tG:\W601-TOOL-R1.0.DSN
* Q; X# a2 [2 x, n' oNetlist Directory:, v6 J& o9 k3 z8 u" _5 R
G:\allegro
" k( ~; i5 d/ n1 l. ] eConfiguration File:5 o3 w9 s5 {/ P t1 A5 o
C:\Cadence\SPB_17.2\tools/capture/allegro.cfg: j, N8 P( d, x4 H# @' \
# V- B6 Q7 \% }5 [Spawning... "C:\Cadence\SPB_17.2\tools\bin\pstswp.exe" -pst -d "G:\W601-TOOL-R1.0.DSN" -n "G:\allegro" -c "C:\Cadence\SPB_17.2\tools/capture/allegro.cfg" -v 3 -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision"
3 I& v$ D* o2 e$ S* {6 J7 j( L' I#1 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV13-C10_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV13-C10_10U".' U" n0 k& G+ y! k
#2 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV14-C11_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV14-C11_10U".
$ q5 E5 e4 u5 S2 n g0 G#3 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV15-C13_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV15-C13_10U".: P k7 A7 C' O O Z
#4 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV16-C15_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV16-C15_10U".& d1 h: a' [# @6 E; |
#5 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV17-C16_10UF/10V" is renamed to "CAP NP_5_RES-0805-REV17-C16_10U".6 v, Y' W& m5 A3 l3 m& w; Q4 s
#6 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV11-C7_4.7UF/25V" is renamed to "CAP NP_5_RES-0805-REV11-C7_4.7U".# j6 A' ?+ f" i0 i
#7 WARNING(ORCAP-36006): Part Name "CAP NP_5_RES-0805-REV12-C8_4.7UF/25V" is renamed to "CAP NP_5_RES-0805-REV12-C8_4.7U".
+ w) W' M" ^5 o4 d" `1 G#8 WARNING(ORCAP-36006): Part Name "LED_12_LED-3MM-D1_3Φ-LED" is renamed to "LED_12_LED-3MM-D1_3X-LED"., [0 d! |! l) w3 c
#9 WARNING(ORCAP-36006): Part Name "LED_49_LED-ODN
; n3 Y8 C' @3 Q$ C) E15112001NRG01-LCM1_ODN15112001NRG01" is renamed to "LED_49_LED-ODN15112001NRG01-LCM"./ V2 Z( g, u6 r- o& u2 N
#10 WARNING(ORCAP-36006): Part Name "LED_49_LED-ODN15112001NRG01-LCM2_ODN15112001NRG01" is renamed to "LED_49_LED-ODN15112001NRG01-L_1".3 Z# M! Q6 E6 }5 Q; Q/ K' j
#11 WARNING(ORCAP-36006): Part Name "LT1005/TO220_5_TRA-TO252-132-U2_AIC1735-50PE" is renamed to "LT1005/TO220_5_TRA-TO252-132-U2".* u5 ]6 G/ B4 p
#12 WARNING(ORCAP-36006): Part Name "LT1005/TO220_6_TRA-SOT23-123-U3_AIC1734-33" is renamed to "LT1005/TO220_6_TRA-SOT23-123-U3".
' s) _( ~, y, g& c) H }0 C KINFO(ORCAP-36080): Scanning netlist files ...7 A0 f& G4 x5 U D; m8 E
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Loading... G:\allegro/pstchip.dat" {( T3 ^, N0 \# @- @! q- H4 e/ y! P
A& q3 ~6 x+ k: XLoading... G:\allegro/pstchip.dat5 c; X3 w \' E% V. n; ?
: z: z& k' R% K
Loading... G:\allegro/pstxprt.dat0 R" X$ G% J4 ] [: H9 C! C! t
( l$ U4 z( Z3 eLoading... G:\allegro/pstxnet.dat
" X" k" w) |; j# Cpackaging the design view...
0 c, n7 D7 f; d2 y+ S; [
9 \' T: c% r& M/ `, H+ r: @( M% jExiting... "C:\Cadence\SPB_17.2\tools\bin\pstswp.exe" -pst -d "G:\W601-TOOL-R1.0.DSN" -n "G:\allegro" -c "C:\Cadence\SPB_17.2\tools/capture/allegro.cfg" -v 3 -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision", Q: ^3 G: o( A
INFO(ORCAP-32005): *** Done **** I! I9 Z. q. T) w- c% W0 j
********************************************************************************
6 E; d" W4 h3 H9 l; h. h( R, B- {, J*
. B1 b. Y7 e5 ~* Updating Allegro PCB Editor Board $ i4 Z: L0 T' f. v' Q, @3 |
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********************************************************************************7 ~7 U0 |$ H8 T0 t8 L! [6 B
INFO(ORCAP-32040): Updating Allegro PCB Editor Board) e! h- y: f) d
1 ~. v% T+ J3 @8 q$ x8 S) L0 n
4 P9 [8 n% {; Z) XSpawning... netrev.exe -y 1 -n -i "G:\allegro" "G:\allegro\W601-TOOL-R1.brd" "G:\allegro\W601-TOOL-R1.brd"" g% Z* @- L1 J' \& J, f* ?
Reading File : G:/allegro/pstchip.dat
' o: t3 D1 d* r7 x& Z(00:00:00.04)- E3 D% f4 m# B# K6 G v* Q
Reading File : G:/allegro/pstxprt.dat
- W$ D* O0 O: g. l6 G2 q/ Z; O(00:00:00.00). }6 d$ ?$ X( T. A! f, _9 T7 F
Reading File : G:/allegro/pstxnet.dat
: R/ f0 @( y3 B: T$ I/ g. P(00:00:00.00)% N: v+ n7 ~. ^' g: ~, P e
Starting to process component instances
( K9 ?7 F& W5 u0 M" f; \: d; B* h( a
netrev run on Oct 28 11:16:14 2016
- Q, h; j, ~( t, S9 L DESIGN NAME : 'W601-TOOL-R1'
5 o& W( n ~0 _6 n: N* @0 T PACKAGING ON Mar 2 2016 00:37:24
6 i& `0 M l4 k3 U7 M
* h' Z) W H" e/ b9 q1 o( s# {( O7 i. I! V. ~) A2 f
2 errors detected( R- d8 P- ?4 ]0 U( X8 H7 l
No oversight detected& ]& M9 b: r/ I; E3 v8 r' l
No warning detected G+ m- |' M- a- E* ?
) d3 H+ F/ ~8 tcpu time 0:00:18
3 Z, u( o1 J( j f) w! e. @elapsed time 0:00:00- y- n8 s8 Z4 U& `; l8 y7 @
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Exiting... netrev.exe -y 1 -n -i "G:\allegro" "G:\allegro\W601-TOOL-R1.brd" "G:\allegro\W601-TOOL-R1.brd"
* l4 [3 |- J0 ]1 R Q$ a9 g(---------------------------------------------------------------------)) g+ F1 y5 D% w5 W
( )
$ A0 E/ \& E4 |3 s( Allegro Netrev Import Logic ), |. F" o% y, w0 `4 o" ]- p
( )
( O4 p0 \' Q* ~& ?( v* b( Drawing : W601-TOOL-R1.brd )
/ N- Y5 L1 g) `1 s5 r: u( Software Version : 17.2S001 )
+ N5 r+ O$ d- f4 ~( Date/Time : Fri Oct 28 11:16:14 2016 )+ q. z( I! h; P6 B: d
( )! I+ ?- d+ _1 P/ {) s. |
(---------------------------------------------------------------------)
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6 b' T) |3 H; ^------ Directives ------------4 G5 k1 @$ P' @6 ]# c% R
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Ripup etch: No
5 a4 x0 P5 i: C9 O% hRipup delete first segment: No; Y* y; s/ K2 K% o/ E/ C$ m
Ripup retain bondwire: No6 {! ]( z, Z' G7 W/ J5 `4 u
Ripup symbols: Always8 T/ ^* h7 ?+ S
Missing symbol has error: No9 P! C, i4 t5 B5 t
DRC update: Yes
5 s5 }6 [' }1 W% X( c8 i w( T7 J9 oSchematic directory: 'G:\allegro'' V. g5 j$ a) A/ K! e: w
Design Directory: 'G:/allegro'+ f( }2 q- _: X, Y2 b2 x
Old design name: 'G:/allegro/W601-TOOL-R1.brd'
" V; o3 J8 W- \New design name: 'G:/allegro/W601-TOOL-R1.brd'
$ E. F3 e( X7 b. N2 F. O' Q6 b* h, F# O9 b' N% X
CmdLine: netrev.exe -y 1 -n -i G:\allegro G:\allegro\W601-TOOL-R1.brd G:\allegro\W601-TOOL-R1.brd
" O6 m! r) ?9 \, y; s8 d+ M! o
8 u ?* q; T' [' z------ Preparing to read pst files ------) M8 c9 z- |5 D, O, l
3 [; q) i h6 M e, i: A
Starting to read G:/allegro/pstchip.dat 8 q# r2 B0 a) S
Finished reading G:/allegro/pstchip.dat (00:00:00.04)
+ V, u7 N/ ?1 |Starting to read G:/allegro/pstxprt.dat
6 X1 Q, U* b* X& @0 o' i Finished reading G:/allegro/pstxprt.dat (00:00:00.00)
$ k+ u, D. W: u, k0 H; G3 MStarting to read G:/allegro/pstxnet.dat
% M& q# @) H% C! \- v Finished reading G:/allegro/pstxnet.dat (00:00:00.00)
, W w2 B* V7 h8 L% P
" O- K5 r/ s9 Q, B7 [1 S------ Oversights/Warnings/Errors ------
# V( y1 ?4 T2 i" J2 E, p* R; ?
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% p. t- y# a9 @3 {# Z#1 ERROR(SPMHNI-176): Device library error detected.
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ERROR(SPMHNI-190): Device problem 'LED_12_LED-3MM-D1_3X-LED'. Package property error: 'VALUE'='3Φ-LED'. Illegal character(s) present in the name or value..
6 s4 j3 h$ x; O( O F# d+ j' w. B7 L j& z& `" Z$ V( `) V
ERROR(SPMHNI-170): Device 'LED_12_LED-3MM-D1_3X-LED' has library errors. Unable to transfer to Allegro.
; b9 _: g5 l' a, I1 `1 T& H; E9 P2 T. T
------ Library Paths ------
$ @, k7 y1 E. Z/ r) i3 kMODULEPATH = .
: t( U' A3 P* g' Q( S3 ?6 q C:/Cadence/SPB_17.2/share/local/pcb/modules $ x( _* X) H; I( X0 g/ q0 B3 Q
; I1 O: f3 b5 m/ i4 M2 W; }/ m
PSMPATH = . 8 ]4 o0 L+ z1 j. g( c& P: Q
symbols 5 o$ P" d& B! G, @5 r6 [6 ] m
..
$ @) W1 q& `' D* d ../symbols 8 M/ R; P `1 d$ G* ? O! ?
C:/Cadence/SPB_17.2/share/local/pcb/symbols
' I3 g3 i/ V2 H$ y% U% M6 F# G" R6 I" G C:/Cadence/SPB_17.2/share/pcb/pcb_lib/symbols 9 N$ }! p1 @& E' h8 Z8 _
C:/Cadence/SPB_17.2/share/pcb/allegrolib/symbols # M0 m& o. ~( N# ]5 @) T3 I. U
9 ?4 h6 y- Y) X0 lPADPATH = .
. T; i$ ~2 F) M symbols
# @6 p: C- a) i# ?$ X8 h .. 8 x& C. @: G3 n
../symbols
m. l6 P8 S, q% n: U% G7 D C:/Cadence/SPB_17.2/share/local/pcb/padstacks
6 |. | g/ q1 a; t3 o( Q9 O C:/Cadence/SPB_17.2/share/pcb/pcb_lib/symbols ( E9 k$ `1 e' G' Y; w/ C# z! \& z
C:/Cadence/SPB_17.2/share/pcb/allegrolib/symbols - B9 d( F$ o0 J6 a9 _
' h0 w, K# P0 Q: C% @! u( A. D; X# T" N
------ Summary Statistics ------" R- Z9 P% D3 j9 b4 I s
2 N; W: W+ @% y3 B/ o' u
0 Q" l& l# ~; I8 f8 _% m#2 Run stopped because errors were detected
4 P) G7 o' I, E, |$ K! L: J
4 g3 R* z) I H+ `) G; onetrev run on Oct 28 11:16:14 2016+ t6 o: y4 ?/ [' p2 }2 T" h
DESIGN NAME : 'W601-TOOL-R1'
0 e) Z: S5 { o1 z* G3 P PACKAGING ON Mar 2 2016 00:37:24
6 |0 B e; `( G! j& ~
7 {3 B( v) A) d9 h/ @ COMPILE 'logic'# v* D% p9 Q6 p P1 K) }
CHECK_PIN_NAMES OFF6 q6 Q+ ?) k5 b9 t% w# l- \8 A
CROSS_REFERENCE OFF
, V' V" c/ X0 I( r( I0 u FEEDBACK OFF
/ D' d/ c0 r2 T6 J+ S1 o% s INCREMENTAL OFF
7 k* M, o1 {7 m. X/ b INTERFACE_TYPE PHYSICAL& r3 m7 R/ V+ ]4 {8 c
MAX_ERRORS 500) D% ]* J. X6 d7 o# E
MERGE_MINIMUM 5! |: _' J4 I/ `' }7 U9 d
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'
1 x/ f6 @6 a C, m. J" \6 q NET_NAME_LENGTH 24/ M+ N2 p. ^+ b4 }7 i, F7 f
OVERSIGHTS ON
+ G9 u$ K, z1 p$ Y, S REPLACE_CHECK OFF
2 r9 {* r' k7 w7 G: } t% S! M5 l8 s3 Z SINGLE_NODE_NETS ON$ B& J( F$ g8 u. B, x" f
SPLIT_MINIMUM 0
; Z8 a- I Z8 w2 E' F SUPPRESS 20
+ U! Q6 Q; R! [" c WARNINGS ON
3 P( p6 j! x# w4 t2 z( m! `# E" H( I1 O2 C
2 errors detected9 @8 ~+ ~. a4 k' s: O
No oversight detected
8 c7 ]; N2 o4 H7 V; u9 \ No warning detected, X( H7 w, A! Y/ G
* Z. T0 f& Y! V C$ r& fcpu time 0:00:182 C, Y$ h& [- h y& j/ z
elapsed time 0:00:00
/ D; Z! S2 s5 T+ f; S. U/ p; T4 Z5 w6 G6 R
INFO(ORCAP-32005): *** Done ***9 V* n+ d+ z& H
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发表于 2016-10-28 11:11
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