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![]() PCB Designer's SI GUIDETable of Content 8 s" S; Y) W" [
Basics of SI___________________________________________________________________5 2 Q# e9 m! V3 e
1.1 When Speed is important? _____________________________________________5 " j$ \' q) D/ D- F2 v* f; J& A
1.1.1 Acceptable Voltage and timing values ________________________________5
% }- x1 E0 S N$ y4 g5 T! h' L1.2 Signal Integrity ______________________________________________________5 " |$ ~5 X4 s) R. T6 {
1.2.1 Waveform Voltage Accuracy _______________________________________5 / c, S, x( y4 W) [* b& N
1.2.2 Timing_________________________________________________________5
, p. v) Z; V) h3 \1.3 Speed of currently used logic families ____________________________________5 : b3 Q% u2 n9 p# [; ~" E8 o1 S
1.3.1 Transition Electrical Length (TEL) __________________________________6 # I8 r+ F: r) D
1.3.2 Critical length ___________________________________________________6 + E( j0 d) ?: k9 Q% ^
1.3.3 What is Transmission Line? ________________________________________6 ; h' J' `* K$ Q# X" g
1.3.4 What is moving in a Transmission line?_______________________________6 ) U) c7 n2 J' H% G
1.3.5 Power Plane Definition____________________________________________6
8 Y4 n' X, t- v2 B0 G1.3.6 The concept of Ground ____________________________________________7
4 a/ r3 a2 { l9 n# O* x' h1.4 STRIPLINE circuit with Electromagnetic field _____________________________7 9 w, q/ p3 c# k5 V8 J( J& M
1.5 RLC Transmission Line Model _________________________________________8
) g% l! `2 X* i, [1.5.1 What is Impedance? ______________________________________________8 : a5 L2 h' n, v2 a
1.5.2 A Practical impedance equation for microstrip _________________________8 4 K# [: F" s* s D
1.5.3 What is relative dielectric constant Er? _______________________________9
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2 Interconnections for High Speed Digital Circuits _______________________________10
" |( ^" p- j+ N; ^$ P2.1.1 Summary______________________________________________________10
7 X& ~1 j% @; Q2.2 Examples of dynamic interfacing problems _______________________________10
8 J" X% ^4 p& w) v/ a. k5 W$ b, \2.3 IC Technology and Signal Integrity _____________________________________12 5 t+ @* U& j7 q0 E, X* n a* A
2.4 Speed and distance __________________________________________________14 1 F2 C* W* b6 k& A- r
2.5 Digital signals: Static interfacing _______________________________________15 ; s8 y% W: E5 }, D1 G- X6 _
2.6 Digital signals: Dynamic interfacing ____________________________________16 0 f) A' L) Q4 e' l' T
2.7 Review questions ___________________________________________________18
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3 Interconnection Models____________________________________________________20 ' Q. u& m1 w( B5 @. }! v
3.1 Summary__________________________________________________________20 5 N% p" I. C" a/ e" a9 r) [1 b! `
3.2 Reference model for interconnection analysis _____________________________20 ) A8 r' J5 \" ?3 ~5 M7 H
3.3 Receiver model_____________________________________________________21 F$ {/ J* [2 D
3.4 RC interconnection model ____________________________________________23
% |: z0 j: f* }# E3.5 Parameters of the interconnection ______________________________________25 % _: |8 @# r: ] ]4 f) t! X
3.6 Refined models _____________________________________________________26
; ~ B- J6 \1 y: |3.7 Review question ____________________________________________________28
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" Z2 [2 G# G; l4 Transmission Line Models _________________________________________________31 1 L' q8 @" ~' r2 V; O& u. K/ K
4.1 Summary__________________________________________________________31 ; H$ _ G5 X% ]7 K
4.2 Transmission line models _____________________________________________31 ! ?/ W# `3 r' b6 k
4.3 Loss-less transmission lines ___________________________________________32
; Q1 _" m8 s# S. m% j4.4 Critical Length _____________________________________________________34 7 f5 f& ^9 Z2 w! M
4.5 Reference transmission line model______________________________________35
s5 h+ `3 ~- O' s2 ~/ L- z: I4.6 Line driving _______________________________________________________36 , n$ N& I, o) x) Z. R7 W7 X2 {
4.7 Propagation and reflected waves _______________________________________37 * ^" l, ~* z" A1 ?% `/ X- q0 ^0 P. u0 z
4.8 A sample system____________________________________________________39
- ]" ?! K: _7 d5 Q; ]1 Y4.9 Review questions ___________________________________________________42 1 Z+ E3 F$ M1 g \4 H2 @
PCB Designer’s SI Guide Page 2 Venkata
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F; j! d1 A' ^2 V9 Q5 Analysis techniques _______________________________________________________45 0 w9 V* f9 m9 ?0 V: J
5.1 Summary__________________________________________________________45
' Z) \0 J4 v" A }% J0 l% i" W- R2 q5.2 Transmission time and skew___________________________________________45 2 `2 R0 z) w7 a- p7 y, W' N3 L( n
5.3 Effects of termination resistance _______________________________________46 4 P0 _. ]! V- s6 s
5.4 Lattice diagram _____________________________________________________48 7 ]! Q: n" ~! [; g" H
5.5 Examples of Real Lines ______________________________________________49
6 K% U. J0 J0 B J- R: Z4 {; j; _5.6 Simulation code ____________________________________________________51 % _2 C( M% _( q; q# r
5.7 Examples of results__________________________________________________54
1 Z+ F# W) |/ _3 ?2 L/ J5.8 Review questions ___________________________________________________55
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6 Design guide for interconnection ____________________________________________57 & W& B- X% b& S, x
6.1 Summary__________________________________________________________57
; I: C6 V! z- s0 H" s3 a; u8 j6.2 Incident wave switching ______________________________________________57 9 |0 M4 Y9 ^ g* r0 G. m
6.3 Effects of capacitive loading __________________________________________58 + i z) o0 E- E
6.4 Termination circuits _________________________________________________59
. ^/ A t2 `( W/ c6.4.1 Passive termination______________________________________________60 W5 e6 e+ N, ?' o
6.4.2 Low power termination___________________________________________61 9 [. { g! P4 @- o/ n& i
6.4.3 Active low power termination circuit. _______________________________61 2 Y- z/ ^, [$ A5 }
6.5 Driving point-to-point lines ___________________________________________62 " {% h& n; z2 j% E, @4 b
6.6 Driving bused lines __________________________________________________64
* q. L& K& C; d/ D6.7 Design guidelines ___________________________________________________67
) e* L) ~% {4 v% D& Z6 _# L9 R& @7 h$ O6.8 Review questions ___________________________________________________67 | 
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发表于 2008-5-26 11:07
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