更新如下; [' @6 r# ]. H( Z# X
DATE: 01-15-2016 HOTFIX VERSION: 063
/ w5 E5 y: q$ h' A" T! p- Z===================================================================================================================================
/ N6 U0 ^" C. F' JCCRID PRODUCT PRODUCTLEVEL2 TITLE
# {& m Y5 R. R& w" R===================================================================================================================================
6 G& X9 J s6 ^. u1472414 ALLEGRO_EDITOR SCHEM_FTB netrev changes pin-shape spacing rulein constraint region& h" }' t7 q) Z) l
1494194 CONCEPT_HDL CORE Random display of the'PHYS_NET_NAME' property in hierarchical designs( \: {( x) r! \7 h
1500190 ALLEGRO_EDITOR EDIT_ETCH Snake Router Creates Line-to-Line DRCs; t' L$ P' f. M3 ~
1501093 SIP_LAYOUT OTHER Package design variant showswirebonds connected to a die which is not part of the variant' }. N9 O$ m$ S& ]; b1 `+ f8 i
1509184 ALLEGRO_EDITOR DATABASE BB vias in mirror have terminal padssuppressed by artwork
% r2 L! c% k8 j- t% g) V# y1511397 SIP_LAYOUT TECHFILE Tech file exported from release 16.5cannot be reused in SiP Layout in 16.5 or 16.61 u, u' B4 G3 }- B% S
1511744 ALLEGRO_EDITOR OTHER Allegro PCB Editor removes propertyfrom component instance" V" Q5 _: U2 A+ t* H" [
1511761 SIG_INTEGRITY OTHER Allegro PCB Editor crashes onrunning the cns_show command.
5 T8 Q; t5 M8 Y1 T1511787 ALLEGRO_EDITOR INTERFACES IPC-2581 not exporting overlappingshapes correctly.
! f0 _1 p5 H1 N2 m6 b1 d1512071 ALLEGRO_EDITOR OTHER The color of 'SHAPE PROBLEMS'subclass is reflected in the color of 'NCLEGEND-1-4' subclass when executingPDF out
x; f: f. n7 f: Y7 D0 Z0 T1513085 CONCEPT_HDL CORE NC pins combine with NC_1 androuted as one net in Allegro PCB Editor# p- t$ ~# U' d P T7 e
1514469 CONCEPT_HDL CORE Unable to get rid of an underscorefrom the PHYS_NET_NAME property
8 ~' U9 @+ G9 d5 ^8 H. B" t1515318 PCB_LIBRARIAN IMPORT_EXPORT Import Pin Table: 'CTRL + C' and 'CTRL + V'not working correctly
2 o' [' ^2 i# w9 B; b1516093 ALLEGRO_EDITOR PADS_IN Pads library translator does nottranslate slot orientation
6 Q: m7 M: q) h5 R |- i* P1517351 CONCEPT_HDL CORE Genview does not update anexisting split symbol
6 R# I$ O2 d4 E& n% @4 a! K5 c1518032 CONCEPT_HDL SECTION How to get rid of error 'SPCOCN-2009- Symbol has the SEC property but the required SEC_TYPE property is missing.'
+ B4 ^6 ^* M5 r- ]1 M/ q1518724 PCB_LIBRARIAN PTF_EDITOR PTF Editor is not saving changes
7 R8 K6 ]8 h+ `- h* ^# }/ I2 G" i/ j1519518 CONCEPT_HDL OTHER Genview does not generate splitsymbols
% e6 C2 `' a+ a( P% w* c1 V9 R1519623 CONCEPT_HDL CORE Differential pair added to aNetClass does not display 'NET_PHYSICAL_TYPE' on the canvas
% I5 t" d( J/ B/ B/ u3 V1520207 CONCEPT_HDL CORE Genview crashes after renamingports
/1 
发表于 2016-1-19 20:33
QQ好友和群
QQ空间
腾讯微博
腾讯朋友
微信
收藏
支持！
反对！
楼主
不用谢。要的自己拿去
。
