|
|
偶也跟一贴！8 @' d8 W! y( d9 ^, {1 I G B
以下内容来自《high speed digital system design》。
! a( {, w* U* k! ?0 W Y! @
( t" x* ~8 \$ G. t" RA via is a small hole drilled through a PCB that is used to make connections between various
% O4 S) O* y1 p( K; ` blayers of the PCB or to connect components to traces. It consists of the barrel, the pad, and
; \1 e4 O% K* e. ithe antipad. The barrel is a conductive material that fills the hole to allow an electrical5 K1 C2 F* h, |" h
connection between layers, the pad is used to connect the barrel to the component or trace,, \- p/ k, X, U- c1 _
and the antipad is a clearance hole between the pad and the metal on a layer to which no6 `( d$ }) L# D9 Q
connection is required. The most common type of via is called a through-hole via because it9 |8 R9 p) U1 f! t
is made by drilling a hole through the board, filling it with solder, and making connections on
3 ]1 M% y7 }( g$ V, Dappropriate layers via the pad. Other, less common types of vias, used primarily in multichip, Z! n( T. g( a
modules (MCMs) and advanced PCBs, are blind, buried, and micro-vias. Figure 5.1 depicts" d$ ]$ Q F# {: W
a typical through-hole via and its equivalent circuit. Notice that the pads used to connect the; {" I) q% X3 Y* ?7 J; r
traces on layers 1 and 2 make contact with the barrel and that there is no connection on p+ }7 o7 S2 v) U
layer 3. Blind and buried vias have a slightly different construction. Since through-hole vias
2 E. X, T$ v' a' Sare by far the most common used in industry, they are the focus of this discussion.
5 }% ~. r& O- d6 A, p3 e) z- p/ j( v: R2 |
Notice that the via model is simply a pi network. The capacitors represent the via pad
3 J) C$ d; l1 r fcapacitance on layers 1 and 2. The series inductance represents the barrel. Since the via
+ D4 I7 S, T# _+ m& @structures are so small, they can be modeled as lumped elements. This assumption, of1 T# Q7 o$ G' a1 ], Y9 k, I/ R0 G
course, will break down when the delay of the via is larger than one-tenth of the edge rate.
2 ^' F9 V' K$ }# @ _/ u' K$ jThe main effect that via capacitance has on a signal is that it will slow down the signal edge, ]3 J/ Q4 ^. \3 R) M5 {& ~
rate, especially after several transitions. The amount that the signal edge rate will be slowed
; k8 C- F# U0 m' `; u" {1 N0 dcan be estimated by examining the degradation of a signal transmitted through a capacitive% X0 w, c- f R; v4 I- e& C
load, as shown later in this chapter in equation (5.21). Furthermore, if several consecutive
/ [# b! K. F7 D* ]4 [vias are placed in close proximity to one another, it will lower the effective characteristic
0 R- m: T( w% ]impedance, as explained in Section 5.3.3. The approximate value of the pad capacitance is
, y6 `5 a$ q+ V& J$ N x[Johnson and Graham, 1993]
" Z/ M# j( C1 E0 R' E8 g
+ |9 g1 U% \5 q( v# f6 n- ][ 本帖最后由 killerljj 于 2007-11-21 20:51 编辑 ] |
|
[复制链接]
/1 
发表于 2007-9-11 14:20
QQ好友和群
QQ空间
腾讯微博
腾讯朋友
微信
收藏
支持！
反对！
" C% J8 ]& H+ F5 A/ s2 E+ Q
发表于 2007-9-15 15:34
俺也顶一下,因为焊盘描述的太形象啦!
发表于 2007-12-19 08:39