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请问各位大虾,1、HyperLynx对PCB板做快速串扰分析时,需要加入器件IBIS模型吗?2、在加入IBIS模型之后,串扰的值一般是多大,不影响设计?
% Z8 a2 ?' q0 K我在DXP下面找了个example,对其进行快速串扰分析时,不加如IBIS模型,采用默认的模型参数为% l: ?! {/ z: L
Board temperature ................ 20.0 degrees C1 A. r1 d) G% D0 T6 a# M0 C4 E
Default IC model (used for quick analysis if IC model is missing)
+ E% W* l3 O/ K- W( m9 t, k IC driver rise/fall time ..2.000 ns4 \ G5 Y9 v3 m: M2 e, S9 _
IC driver switching voltage range ..3.00 V( T3 D" @ v5 ^4 o& l' f
IC driver output impedance 1.0 ohms
, A- O! i& X" [ k. C% } IC input capacitance ..... 7.0 pF
. }) S" p6 V( o f9 O串扰门限为
# ^% |) [7 t( y& I t- Y% m3 IMaximum allowed crosstalk ........... 200 mv peak) \4 g9 x7 ^: _6 _+ v6 z
特定看一个网络:
- [' h' H- t4 K% t NET = SOFT_TCK- f5 n. R" t3 p
ELECTRICALLY ASSOCIATED NETS --------------------------------------9 [' t9 x. U2 w' \# z0 d
None
6 h2 c( n5 P( {/ N2 ~1 I AGGRESSOR NETS (Estimated peak crosstalk)1 ?7 A- z6 \ o1 D
NetFPGA1S_B22 .................. 233 mv
! Y" L* M( a/ C! B Total estimated crosstalk ....................... 233 mv `# e, ^, U1 Y) W1 Q4 c8 V5 J
** Warning ** Estimate exceeds maximum allowed crosstalk!
3 h8 K. V+ q( \: n2 ]) n7 l' |而我分配模型之后,该网络的串扰增加了很多:
* o/ ~( P' P4 |. E NET = SOFT_TCK
9 n' V- M% D1 d ELECTRICALLY ASSOCIATED NETS --------------------------------------
4 C; v2 q1 a4 h& T3 E None. Z5 Y; f8 _/ P6 i# \; T! Q
AGGRESSOR NETS (Estimated peak crosstalk)6 }3 i. s* y+ e% r; N
NetFPGA1S_B22 ..................1268 mv
" L& a$ K" g) N \) \' i( A NetFPGA1S_A21 ..................1053 mv
' y% r9 d5 a8 j2 U8 d' \- [- o NetFPGA1S_A20 .................. 456 mv
1 F6 a' L6 c4 B/ e5 ]- C( s SOFT_TDI ....................... 319 mv
9 X, r: r! F* ^% ]% k DIG5_SEG2 ...................... 227 mv
+ M$ U- e r/ T+ W; h& q ` Sum of the two strongest aggressors .............2321 mv
! O+ O6 Z6 ^. q. W4 w5 y ** Warning ** Estimate exceeds maximum allowed crosstalk! |
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