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我在做数模混合仿真的时候,在config中调用模拟电路和数字模块的symble,但是在进行display partition>all active时,系统报错:
3 w( H2 c' @, ~& D4 y\o *SYSERR: Unable to hdbBind for inst I15 in cell Module tiadc, lib design, view schematic, configViewString spectre spice verilog verilogams behavioral functional schematic veriloga vhdl vhdlams hdl system verilogNetlist cmos.sch cmos_sch ahdl.1 f' J5 {- y: s: O) L, r
\o *USRERR: Selected context view string 'spectre spice verilog verilogams behavioral functional schematic veriloga vhdl vhdlams hdl system verilogNetlist cmos.sch cmos_sch ahdl'
N: B% I" v8 x' I7 y/ F: i- G\o offers no suitable view for inst I15 referencing placed master design.add_and_mult.symbol$ j- T6 t/ k' P% x, O0 x$ N
\o in cell Module tiadc, lib design, view schematic, configViewString spectre spice verilog verilogams behavioral functional schematic veriloga vhdl vhdlams hdl system verilogNetlist cmos.sch cmos_sch ahdl.
8 T1 F% D# m. k; m5 S" U\o Please check HDB configuration or library setup.
& `0 ^5 h( Z- c( l1 z+ F0 E1 z) j @$ `\o *USRERR: Selected context view string 'functional'0 o0 |6 S4 w: I; S- }0 X9 f
\o offers no suitable view for inst I14 referencing placed master design.average.symbol. x7 s- f5 s6 Q* g- R
\o in cell Module tiadc, lib design, view schematic, configViewString spectre spice verilog verilogams behavioral functional schematic veriloga vhdl vhdlams hdl system verilogNetlist cmos.sch cmos_sch ahdl.
2 |, a5 \. b/ E\o Please check HDB configuration or library setup.
' @: U& }) X& q* h0 j' J2 e\o *USRERR: Selected context view string 'functional'% @) n+ K4 |3 N8 d- A% }
\o offers no suitable view for inst I12 referencing placed master design.unit2.symbol. V- K4 e9 G9 n
\o in cell Module tiadc, lib design, view schematic, configViewString spectre spice verilog verilogams behavioral functional schematic veriloga vhdl vhdlams hdl system verilogNetlist cmos.sch cmos_sch ahdl.
; y4 b! X- r2 Q\o Please check HDB configuration or library setup.
$ W1 R T) W6 t- t" T- a j6 w\o *USRERR: Selected context view string 'functional': N+ C2 k; @* O3 q9 z% V
\o offers no suitable view for inst I11 referencing placed master design.unit1.symbol
' H1 E7 Z7 a) j c. B& N. o% I6 U\o in cell Module tiadc, lib design, view schematic, configViewString spectre spice verilog verilogams behavioral functional schematic veriloga vhdl vhdlams hdl system verilogNetlist cmos.sch cmos_sch ahdl.8 }( d- t+ D. ?- @( x$ A
\o Please check HDB configuration or library setup.
! H5 u5 E) \3 E; v/ m0 R\o *USRERR: Selected context view string 'functional'/ q1 x _1 P7 W0 Q, t) O
\o offers no suitable view for inst I4 referencing placed master design.encode.symbol, a, i# `7 A# L3 Y4 ]+ m! y- B
\o in cell Module tiadc, lib design, view schematic, configViewString spectre spice verilog verilogams behavioral functional schematic veriloga vhdl vhdlams hdl system verilogNetlist cmos.sch cmos_sch ahdl.
) b" {2 s" I# P& m\o Please check HDB configuration or library setup.+ {; |0 }0 O$ Z9 B; h' m6 a4 G( [$ _# m
\o *USRERR: Selected context view string 'functional'1 i# ~# m; `% {9 m/ x1 C
\o offers no suitable view for inst I2 referencing placed master design.encode.symbol0 J, m, F: v; N( c3 g0 }
\o in cell Module tiadc, lib design, view schematic, configViewString spectre spice verilog verilogams behavioral functional schematic veriloga vhdl vhdlams hdl system verilogNetlist cmos.sch cmos_sch ahdl.& M, [( o3 r4 Y, `" M, [
\o Please check HDB configuration or library setup.& H. B6 U+ f: t4 q5 N" k, d4 R, F
\e *Error* Failed to partition the design.
+ Z0 T( U$ g& q' D# {9 ~) |) b\e
9 U$ o: B, S2 u% q5 r\e *Error* mspDisplayPartition: Failed to create network
# a! @7 ~% _$ A: l* j/ ]5 h$ F+ u% ?3 S+ k& C& F
这是什么问题啊?求大神帮忙解决一下,鄙人不甚感激!!! g( J: X; L* q% f. t
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