|
EDA365欢迎您!
您需要 登录 才可以下载或查看,没有帐号?注册
x
更新内容及模块:8 Q" v, e" W3 Z1 e; J X
DATE: 06-14-2013 HOTFIX VERSION: 011
/ i o% T' k* ^1 F. c=================================================================================================================================== k$ Y& I* r3 ]4 D
CCRID PRODUCT PRODUCTLEVEL2 TITLE/ _9 O" M( K* _' F! a2 d5 [
===================================================================================================================================
$ R/ P' x4 w) x; l3 M% M982306 CONCEPT_HDL OTHER When plotting a PDF publisher output the page coming out half inch bigger in pdf
e* \; o/ @# H1055338 SIP_LAYOUT DRC_CONSTRAINTS Soldermask to Via drcs on bondfingers* ?8 @& v2 Y7 E( ~: E8 l8 {
1093375 ALLEGRO_EDITOR PLACEMENT Align Module with Zero spacing value space the modules further away the modules should be nearer, G4 U9 v+ Y2 q+ W" V9 Y5 w, w
1103201 RF_PCB FE_IFF_IMPORT Wrong permissions to map file during IFF import: s$ c. c9 _, \) x- ]
1106900 CONCEPT_HDL COMP_BROWSER Component Browser performance utility should honor CPM directives for include and exclude PPT
. N# k* r# U, z' }* Q) G1110178 ALLEGRO_EDITOR EDIT_ETCH Line Width Retention should be controlled via setting
% i& D Z- K* K+ k1110323 APD DXF_IF DXF out is offsetting square discrete pads.6 L" s/ p. W# s) q
1123581 ALLEGRO_EDITOR MANUFACT Dimension Line gets changed on board! x; [" s$ V4 C
1134083 CONCEPT_HDL OTHER Published PDF file's hyperlinks do not work fine when user use double digits partitions for page Border.
1 S, y* N! l+ s: V4 a1139338 ALLEGRO_EDITOR DRC_CONSTR The total etch length does not seem to work for Xnets after setting the variable "retain_electrical_constraints_on_nets"
6 `/ P5 I9 [3 Z' v, ^ {5 e1139361 ALLEGRO_EDITOR DRAFTING Angular dimension tolerance is incorrect when plus minus tolerances are equal.
5 o: ^3 q2 P. A; G1 i+ R1141882 ALLEGRO_EDITOR EDIT_ETCH Allegro Crashes during diffpair slide
7 o/ I4 X- f w+ q1142876 ALLEGRO_EDITOR SHAPE No DRC error when airgap between place bounds exactly zero
5 g- P, g$ R6 t1145235 CONCEPT_HDL CONSTRAINT_MGR DEHDL CM gives error when trying to launch SigXP, v# g D! M! O
1145243 ALLEGRO_EDITOR NC Duplicate drills found in the NC Drill output
3 z5 _8 B8 T' K' d; z; c1145260 SIP_LAYOUT DIE_EDITOR Enable "Copy" in die editor7 \3 H7 ?. S6 c2 ~
1145284 CONCEPT_HDL CORE Publish PDF crashes DE HDL
1 x. e; b* _ W8 V; ?2 W- H1145333 ALLEGRO_EDITOR SHAPE SHAPE boundary may not cross itself. Error cannot be fixed.
B: C* c6 |& e# k& e1145856 ALLEGRO_EDITOR DRC_CONSTR DRC Line to Thru Pin appear while Fillet be added& {$ ]1 g4 B) v
1146287 PCB_LIBRARIAN CORE PDV expand pins and change origin sets coordinates for few pins wrong and places pins on top of each other after collaps6 ]# N5 |6 l- F+ E' R
1146865 ALLEGRO_EDITOR DATABASE Allegro crashes when trying to place mechanical symbol; J. N6 Z4 K; h8 X+ R, x6 \
1148513 ALLEGRO_EDITOR OTHER Importing a subdrawing file causes incorrect net name assignment.5 L3 o9 y. C' v3 J Q
1148734 CONCEPT_HDL OTHER Logical Symbol Text is turned upside down after extracting PDF by Publish PDF
7 L% h2 F& a0 g- B! m1149025 ALLEGRO_EDITOR INTERFACES IPC-2581 imports cross-hatched shapes as solid
' T# k$ x9 P' V3 r, ~$ ]7 E1149948 APD OTHER Stream_out hangs on this design -- hang processing merge of overlapping shapes using poly_deletecolinear_only()
6 d8 f7 v9 ]+ c# T- s" ~1150274 CONCEPT_HDL CORE Uprev from 16.3 to 16.6 is not preserving RefDes2 h+ I8 Z+ i" Z' w* [. T
1151450 SIP_LAYOUT DXF_IF DXF export from CDNSIP missing symbols, p: |! P5 T8 l4 N1 q* d5 B) C* g# j
3 K- I9 O0 @# s7 N( F
8 }' Y0 M c* d* b下载链接:6 n! l& c, |2 O+ V1 r. u; f
http://pan.baidu.com/share/link? ... 5&uk=38260382940 P* r7 k1 E. p( K( {. O
|
评分
-
查看全部评分
|