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Cadence SPB16.6已经推出，需要的朋友可以点击下面的链接下载：
* s1 Q7 m* Q! J/ S* X7 _7 c( k8 Ndl.vmall.com/c0pxuzug1s
7 }. Z% P. ?+ s% Q3 T0 q: Y0 R里面有补丁Hotfix_SPB16.60.001_wint_1of1.exe
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DATE: 03-7-2013 HOTFIX VERSION: 005
# O* h& D( Z( @5 z3 K===================================================================================================================================
$ ~; {* `; I# i2 {+ bCCRID PRODUCT PRODUCTLEVEL2 TITLE
& t7 ^# P! K/ {4 R! @===================================================================================================================================
3 {/ F, g; l1 J J; {0 u; V1067770 IXCOM-COMPILE COVERAGE Assertion failed: file ../covToggleCoverageXform.cpp, line 1102
3 Q5 J6 p% r4 f& G1100442 ALLEGRO_EDITOR PLACEMENT Placement queue shows components whichs are already placed! C/ r% s9 G* `9 x
1101555 ALLEGRO_EDITOR DATABASE Allegro Crash frequently
6 K# O5 W5 f. S+ B9 A |; m1 h1104011 ALLEGRO_EDITOR DATABASE Place replicate move group of a modules leaves traces behind
: _1 T2 J" g ?# u/ K6 Y1104065 SCM NETLISTER SCM 16.6 has problem generating Verilog with existing sym_1 view# P$ _* d6 S4 u- D, C
1104605 F2B PACKAGERXL Pins of function swapped part in block not displayed2 V$ f) w! E- F9 d+ l# T; D# g2 V# X
1104790 SCM IMPORTS Corrupt data once SiP file is imported into SCM
, i: R6 d) m! F I; t1105066 APD IMPORT_DATA Import NA2 worked in 16.5 "035" but fails in 037 and 16.6$ E$ w. J0 n9 s5 l' |" f+ A5 U
1106323 ALLEGRO_EDITOR PLACEMENT Unable to locate specific placed symbol on this board as it becomes invisible after placement.- c$ x/ K7 h" ~; n
1108032 CONCEPT_HDL CORE 'Find' option does not list all Components in the Design
& z( f; ?( R# J* w% Y' X6 @1109080 ALLEGRO_EDITOR OTHER Window DRC is not working in OrCAD PCB Editor Professional |
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发表于 2013-3-15 15:12
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支持！
反对！
发表于 2013-6-29 13:29
