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获奖论文在各公司的分布情况
本帖最后由 stupid 于 2013-2-16 14:49 编辑
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1. A reusable generic platform for validation and characterization of high speed mixed signal designs7 _& }4 c, l& e+ ^0 }0 F' Z* N& u+ J
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Rambus 出品。
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2. A rapid prototyping of FPGA-Based duobinary transmitter/receiver for high speed electrical backplane transmission7 c2 p6 }% Y5 q' k
/ {3 y, t- M' Q# Z; G宾大和Agilent联手,Agilent方面是Mike Resso." [9 L' X% ^7 L% s9 {! y3 W
3 ^: V8 A* x: l2 d( S8 P7 u) z3. channel to channel crosstalk behavior and design optimization for ddr4 memory buses
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/ r" c- V n: ^7 b: z. NIntel,Xiang Li,DDR4连接器规范的制定者。! Y3 E& p" f- F- `
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4. signal and power integrity(SPI) co-analysis for high speed communication channels# R4 q% K; `0 u6 k' b) h
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IBM美德研发中心联手。/ M& w* a3 q. p2 h8 N$ d- O* K3 }
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5. innovative PDN design guidelines for practical high-layer-count pcbs6 x+ e8 A7 |, D- k; c. p5 {/ A
+ o( _$ [ L x9 {' |1 N: g) f作者主要来自密苏里理工,其中Siming Pan 和Jun Fan都来自清华,后都就读于密苏里,俩人貌似有师生之谊。
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$ a+ r1 |8 @- c3 R6. Time domain and statistical model development,correlation,and analysis methods for high speed SerDes
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2 D/ T3 w" q7 j* z L( M- `) oLSI和Agilent联合,Agilent是Fangyi Rao。
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7. applying microwave techiques to digital systems: a simple case study2 ~" [3 f: ?& O! @ t
0 c# J9 Y+ ~2 O& rCray、SiSoft联合出品。
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8. high throughput,hign-sensitivity measurement of power supply-induced bounded,uncorrelated jitter in time,frequency,and statistical domains
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* h7 [) k* H5 U! l, X" f; l3 XAltera出品,3个作者都是亚裔,其中大家熟悉的Daniel Chow,以及一位疑似华人Shishuang Sun。1 x* Z K0 f W$ M3 A- @) q
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9. beyond 25Gbps:a study of NRZ and multi-level modulation in alternative backplane architectures9 e$ ]$ s5 D$ F" e5 v2 {* e) x6 a
" I* a0 q& `, q5 t% y+ w) jLSI、TE联合出品
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10. Memory interface on-chip PDN noise Charachterization,modeling and its impact on timing
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Altera出品,9位作者。
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9 f ~3 a) F q7 |) N* q11. Enabling DFT logic and timing verification in mixed signal designs
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- o, ` W( X9 v9 c& b: x: k3 YRambus和Synopsys联合出品。3 u* E: [; \5 w" I1 B& l4 ]; p8 w8 J
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12. analytic solutions for periodically loaded transmission line modeling
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Intel 和 Ansys 联合出品。
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13. power-signal co-integrity design for multi-Gbps low-power DDR3 mobile platforms
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L0 \: z& N! O6 N" m7 g3 \; w- jSamsung出品,目前似乎还没有用LPDDR3的手机,但是毫无疑问,这将会很快成为智能手机的标配。
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14. power/Ground bump optimization technique on early design stage/ l. r! A4 l: P! M k6 n u L ]
- V/ T# L2 O- A: G2 z% L; a" VSmasung出品。 g; |. c: Z& j/ T4 e) E8 ]5 n1 y
% q& u0 ~* f( L8 B$ S! F5 c% M15. DDR memory channel design from passive stub eqalizer perspective
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Intel,貌似1位华人 Qin Li。2 `3 V- k& ], x3 V5 J/ _; D$ V
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16. using power aware IBIS v5.0 behavioral IO models to simulate simultaneous Switching Noise; _6 H6 Q1 J4 j# L6 p' i
+ k! B1 z% a7 l8 _) R v0 KXilinx 和 Cadence出品,非常有用的SSN仿真文章。1 C7 ?( T4 c' P$ U7 I4 q. p
. K. C5 k/ `0 E# _% z17. validating EMC simulation by measurement in reverberation chamber
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$ D# @# ^: Z& M% z来自Cisco,作者中有4位华人,3位来自思科中国研发中心,分别是Xiaoxia Zhou,Hongmei Fan,Jinghan Yu
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18. 3D interposer design and electrical performance study
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Rambus 联合出品。
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( q: h J4 V/ J1 ~$ o19. Dramatic noise reduction using guard traces with optimized shorting vias
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Eric Bogatin和Lambert Simonovich联手
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8 ~, u% E0 r) J20. effects of ground via asymmetry on mode conversion for high speed differential signals
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- d, T' S6 ?/ G) [/ |, ]1 cIBM独家出品。
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21. design and analysis of a high-speed parallel interface for 16Gbps coded differential signaling; v9 g3 \" b4 d& U, j- ]4 `9 b
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Rambus、Samsung联合出品。
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1 }( u; C3 `8 I7 ~, ~22. measurement-based simulation:increasing IBIS-AMI model Accuracy with Data from lab measurements
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* Q1 r7 x! x9 c2 wSiSoft、Ericsson联合出品。
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2 R; ]& H- F v23. accurate receiver clock positioning in high speed parallel buses
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" J; u: b6 T9 E2 O8 {+ j) ORambus、Altera、xilinx、Qualcomm 联合出品。
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24. partial response and noise predictive maximum likelihood(PRML/NPML) Equalization and Detection for high speed serial link systems
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9 _% |' g5 f7 W! M6 J; a2 I1 ?LSI出品,3作者中有一个中国人,Cathy Ye Liu,1995年清华毕业,后去了美国。
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2 M$ |% I7 t! l25. Which one is better?comparing options to describe frequency dependent losses& z1 f% d! m! d
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Eric Bogatin联合CCN,Simberian出品。# |( s2 w7 r3 r) }" p8 |8 z! r0 T5 E
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26. a reverse nyquist approach to understanding the importance of low frequency information in scattering matrices & W, L" `$ l5 U* d, u
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Ansys出品- |/ O& W% t0 S" Y+ F
/ a; C* S7 |$ w* h4 I) x27. Terabit/s packaging design for testing of high speed IC transceivers
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8 S9 s# X+ u% S! v+ m5 I出自鼎鼎大名的IBM T.J.Watson Research Center,Xiaoxiong Gu是众多作者中的一位。
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* w: I0 ~+ Q& N28. Channel operating margin(COM):evolution of channel specification for 25Gbps and beyond1 a+ T1 {, {1 A* b1 ?$ i
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Intel、Altera联合出品,Mike Peng Li出手啦。4 P$ q$ M- Y. B, p# ?9 e7 Z/ B0 E
/ r- i6 W7 r, B# @. N9 i从今年DesignCon的获奖论文看,Rambus依然是论文大户,共有5片论文获奖,其中4篇是和别人合作。Intel 4篇,2篇与人合作。Altera 4篇。IBM独自贡献了3篇。 Samsung 3篇,一篇和Rambus联合,跟最近整个三爽的势头一样,表现的很猛。LSI 3篇。Agilent、xilinx、Sisoft都是2篇。多产的Bogatin博士,也是2篇。仿真大户Ansys这次只收获了1篇。 整机厂商,如Cisco、Cray、Ericsson则均收获了一篇。6 l% r! _; N' T' h1 n( G
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密苏里理工表现优秀,乔治亚理工则没有收获。
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! E- i6 q) r3 {& D0 K! p- y5 ]5 ^国内SI的领头羊,华为亦有论文宣讲,但未中奖。另外Qualcomm的有线部门开始发力,他们目前的重心应该在10G 以太网上。
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' N8 q2 g3 ~$ G/ Z- `% _( x6 n. E" L另外,几乎每篇获奖论文的作者都有一个华裔,从侧面反映出来中国人苦逼,到哪儿都是做民工的命,呵呵……6 O/ P: q' v* G& h q
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