剧透：DesignCon2013的获奖论文

stupid

1. A reusable generic platform for validation and characterization of high speed mixed signal designs
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2. A rapid prototyping of FPGA-Based duobinary transmitter/receiver for high speed electrical backplane transmission

3. channel to channel crosstalk behavior and design optimization for ddr4 memory buses

7 u0 C9 q- i9 R) A4. signal and power integrity(SPI) co-analysis for high speed communication channels

/ @' V6 a# z, L2 c& f" X3 }5. innovative PDN design guidelines for practical high-layer-count pcbs
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6. Time domain and statistical model development,correlation,and analysis methods for high speed SerDes

7. applying microwave techiques to digital systems: a simple case study

8. high throughput,hign-sensitivity measurement of power supply-induced bounded,uncorrelated jitter in time,frequency,and statistical domains

9. beyond 25Gbps:a study of NRZ and multi-level modulation in alternative backplane architectures
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* h) e3 c/ i' [0 _& T4 I, y; B10. Memory interface on-chip PDN noise Charachterization,modeling and its impact on timing
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11. Enabling DFT logic and timing verification in mixed signal designs

) D; ?2 m: Y) S) n- ]# C" t) ^12. analytic solutions for periodically loaded transmission line modeling

: b' c3 z$ F  ^$ P! \( E8 ?13. power-signal co-integrity design for multi-Gbps low-power DDR3 mobile platforms

# s! `  R8 }0 i- @2 i4 \- h0 q14. power/Ground bump optimization technique on early design stage
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  c  E2 U& G4 i6 y- b& D15. DDR memory channel design from passive stub eqalizer perspective
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6 v8 p+ l; @+ ]' J3 O0 C16. using power aware IBIS v5.0 behavioral IO models to simulate simultaneous Switching Noise

# r4 [  W4 Q! ]; {* _1 r% u0 d- h17. validating EMC simulation by measurement in  reverberation chamber
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9 i* [9 M) ?1 p* P& j# v- \18. 3D interposer design and electrical performance study
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19. Dramatic noise reduction using guard traces with optimized shorting vias

20. effects of ground via asymmetry on mode conversion for high speed differential signals

21. design and analysis of a high-speed parallel interface for coded differential signaling

22. measurement-based simulation:increasing IBIS-AMI model Accuracy with Data from lab measurements
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23. accurate receiver clock positioning in high speed parallel buses

' S$ H+ `  B( s24. partial response and noise predictive maximum likelihood(PRML/NPML) Equalization and Detection for high speed serial link systems
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- b# @, o2 h! [% R5 {+ u3 f25. Which one is better?comparing options to describe frequency dependent losses

26. a reverse nyquist approach to understanding the importance of low frequency information in scattering matrices

27. Terabit/s packaging design for testing of high speed IC transceivers

28. Channel operating margin(COM):evolution of channel specification for 25Gbps and beyond
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+ F  u; S* Q& j（7楼继续。。。）



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frank2

技术无止境，慢慢看

stupid

chenqianwjkx 发表于 2017-3-21 05:51
, v; ~  N2 h- Z) @, f" I( {想下载，不知道哪里能下到这些有用的文章

本论坛就有下啊

chenqianwjkx

想下载，不知道哪里能下到这些有用的文章

2821462144

路过，了解，

qiye408

学习下，楼主V5

sleeper2008

只能看名字，还是顶一个

lpch8

分析的好，慢慢看吧。

stupid

( G& W) s+ W1 ]5 X0 K0 X/ n+ b+ P1. A reusable generic platform for validation and characterization of high speed mixed signal designs
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. r2 y! h3 W2 V% t) vRambus 出品。
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2. A rapid prototyping of FPGA-Based duobinary transmitter/receiver for high speed electrical backplane transmission

宾大和Agilent联手，Agilent方面是Mike Resso.

! u3 c0 C3 y: L3 c+ I2 M1 u" R: Q3. channel to channel crosstalk behavior and design optimization for ddr4 memory buses

! ]9 w# Y* J5 s8 R; x& a, s; jIntel，Xiang Li，DDR4连接器规范的制定者。
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! O) D% L7 q) `/ P. i' ^8 X: O4. signal and power integrity(SPI) co-analysis for high speed communication channels
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5 Y+ e5 s" A+ j6 d, ?$ A- {# {$ S/ YIBM美德研发中心联手。
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5. innovative PDN design guidelines for practical high-layer-count pcbs
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; O! O  l: _$ d4 Q) V作者主要来自密苏里理工，其中Siming Pan 和Jun Fan都来自清华，后都就读于密苏里，俩人貌似有师生之谊。

9 y* N- z6 _; \; a6 \6. Time domain and statistical model development,correlation,and analysis methods for high speed SerDes
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1 ?+ H% R4 s6 C* s; Y8 E; c5 cLSI和Agilent联合，Agilent是Fangyi  Rao。

7. applying microwave techiques to digital systems: a simple case study

; {- \9 I0 {% ?, BCray、SiSoft联合出品。

8 c: S4 s( _" t9 U5 q+ Z; G5 S- W7 ]5 \& A8. high throughput,hign-sensitivity measurement of power supply-induced bounded,uncorrelated jitter in time,frequency,and statistical domains
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" F) Y! q9 |& w* dAltera出品，3个作者都是亚裔，其中大家熟悉的Daniel Chow，以及一位疑似华人Shishuang Sun。

" p# C4 o! a# e. `9. beyond 25Gbps:a study of NRZ and multi-level modulation in alternative backplane architectures

LSI、TE联合出品
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10. Memory interface on-chip PDN noise Charachterization,modeling and its impact on timing

/ c: M- F0 k; ?- d* K6 IAltera出品，9位作者。

11. Enabling DFT logic and timing verification in mixed signal designs

Rambus和Synopsys联合出品。

12. analytic solutions for periodically loaded transmission line modeling
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. Y4 N( V& x. }. d1 H, ?Intel 和 Ansys 联合出品。
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& r! {0 Q2 G# T1 P, Y) S3 Y+ F/ \$ q13. power-signal co-integrity design for multi-Gbps low-power DDR3 mobile platforms
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' f) n, e6 }( O: jSamsung出品，目前似乎还没有用LPDDR3的手机，但是毫无疑问，这将会很快成为智能手机的标配。
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2 b( z2 Y* L% ?4 U' B1 E& t8 ~14. power/Ground bump optimization technique on early design stage

5 y% b9 ?; L1 m3 ASmasung出品。
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' c  G6 ?' F! W: Y15. DDR memory channel design from passive stub eqalizer perspective
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Intel，貌似1位华人 Qin Li。

16. using power aware IBIS v5.0 behavioral IO models to simulate simultaneous Switching Noise

Xilinx 和 Cadence出品，非常有用的SSN仿真文章。
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17. validating EMC simulation by measurement in  reverberation chamber
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来自Cisco，作者中有4位华人，3位来自思科中国研发中心，分别是Xiaoxia Zhou，Hongmei Fan，Jinghan Yu
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18. 3D interposer design and electrical performance study
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: B: d8 c: ?  _  w7 jRambus 联合出品。
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7 l8 a6 M" Y. ^; Y; t19. Dramatic noise reduction using guard traces with optimized shorting vias

Eric  Bogatin和Lambert Simonovich联手
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( c  F/ l, V1 q, w, n9 ^20. effects of ground via asymmetry on mode conversion for high speed differential signals
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" d5 ?& ]% }$ z% ]. V! N8 e' }# `; |IBM独家出品。
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, s/ S/ J& J) ]0 B( L- O8 ]21. design and analysis of a high-speed parallel interface for 16Gbps coded differential signaling
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Rambus、Samsung联合出品。
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, G$ O6 Z; m( ]9 [1 O: ?- c* G2 Y1 U/ K22. measurement-based simulation:increasing IBIS-AMI model Accuracy with Data from lab measurements

SiSoft、Ericsson联合出品。

+ J5 A. G6 o8 _6 _/ K1 d; R3 z23. accurate receiver clock positioning in high speed parallel buses
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4 k1 Z  q* ~( J8 e4 dRambus、Altera、xilinx、Qualcomm 联合出品。
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$ Y' ~; A1 k4 h1 u24. partial response and noise predictive maximum likelihood(PRML/NPML) Equalization and Detection for high speed serial link systems
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+ Q: A7 J9 T' G, b- dLSI出品，3作者中有一个中国人，Cathy Ye Liu，1995年清华毕业，后去了美国。

% X, T, d' A6 |- z25. Which one is better?comparing options to describe frequency dependent losses

# g+ A' A! ^0 g3 t9 t1 QEric Bogatin联合CCN，Simberian出品。

26. a reverse nyquist approach to understanding the importance of low frequency information in scattering matrices
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5 m$ e; t/ h8 _; B3 n3 k+ u6 IAnsys出品

$ ]/ _  O! i. u7 v27. Terabit/s packaging design for testing of high speed IC transceivers
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出自鼎鼎大名的IBM T.J.Watson Research Center，Xiaoxiong Gu是众多作者中的一位。
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28. Channel operating margin(COM):evolution of channel specification for 25Gbps and beyond

! x6 P2 }4 X' `) ?: VIntel、Altera联合出品，Mike Peng Li出手啦。
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从今年DesignCon的获奖论文看，Rambus依然是论文大户，共有5片论文获奖，其中4篇是和别人合作。Intel 4篇，2篇与人合作。Altera 4篇。IBM独自贡献了3篇。 Samsung 3篇，一篇和Rambus联合，跟最近整个三爽的势头一样，表现的很猛。LSI 3篇。Agilent、xilinx、Sisoft都是2篇。多产的Bogatin博士，也是2篇。仿真大户Ansys这次只收获了1篇。 整机厂商，如Cisco、Cray、Ericsson则均收获了一篇。
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密苏里理工表现优秀，乔治亚理工则没有收获。

国内SI的领头羊，华为亦有论文宣讲，但未中奖。另外Qualcomm的有线部门开始发力，他们目前的重心应该在10G 以太网上。

) p/ ~' f" L4 E6 m( B" S" K8 {另外，几乎每篇获奖论文的作者都有一个华裔，从侧面反映出来中国人苦逼，到哪儿都是做民工的命，呵呵……

lpch8

非常感谢分享，那里能下载到论文，每年这个时候就期待。

understudy

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共享其中几篇SPI方向的文章：
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( ~) U# P; ]$ h$ ]* C4 e! g3、Channel to Channel Crosstalk Behavior and Design Optimization for DDR4 Signaling
5 R. ~( R0 [$ K$ S) Y, w4、signal and power integrity(SPI) co-analysis for high speed communication channels
) Z/ T; p/ a& N/ l+ I8 V5、innovative PDN design guidelines for practical high-layer-count pcbs
9、beyond 25Gbps:a study of NRZ and multi-level modulation in alternative backplane architectures

signory

如何下载这些论文？

dzgking

看到这些感到学无止境啊，叹自己懂得太少

wanily

很好的题目  能看个详细的就好了