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*PADS-ECO-V9.2-MILS*
w7 b! [! F& m7 M5 w& ]* i& S*REMARK* old file: C:\PADS Projects\ppcbnet.asc
8 ^5 r& g- x# r4 m0 D5 q2 {*REMARK* new file: C:\PADS Projects\padsnet.asc
+ Q# K S) ]4 E1 h+ H% W! u2 X*REMARK* created by ECOGEN (Version 6.4v) on 2012/6/19 9:34:32; v2 W1 q0 |/ @* W1 C+ J
*DELPIN*
* ?" ^ ?0 S5 H0 x9 k5 G6 OU33.19 NSRAMA17
( D; F* O, y8 M# O$ ^U33.20 NSRAMA16
4 D/ A2 t) I8 G, I7 Y; j9 CU7.A10 NSRAMA172 F* U( f% C8 `$ z$ I
U7.B10 NSRAMA160 e3 k; ?$ L& H3 W
*CHGPART*
) t- |# t8 h1 i' t' e- tC130 CAP0603@0603 CAP0603@0402% j( A& X+ G. ^ A) _% X
C132 CAP0603@0603 CAP0603@0402
0 B# d" _2 v& xC136 CAP0603@0603 CAP0603@0402
! Q7 V0 ?8 @4 ?3 T h t: t*NET*/ ^) P* }: i6 }# _$ D5 W' E& `
*SIGNAL* A_+3.3V7 v5 m5 ]. F$ i) c9 q3 {
D2.1
- e' @6 S0 _# }; i e" |*SIGNAL* A_VEDIOB_A) z0 H; H! s; t& M0 d
R20.2% C( X k |1 s: [1 x, x9 v
*SIGNAL* A_VEDIOR_A
: q. o) Z( ^+ d k: ER22.2( |7 V& e" S1 B
*SIGNAL* FPGA_REST#
: y6 e5 K9 t2 O* G4 [D2.2" Z, {7 S. v! _3 R# }2 V" W
*SIGNAL* NSRAMA16
- w9 L. l2 r8 _U33.20 U7.A10
" i# Q5 E ] d; U0 [; m*SIGNAL* NSRAMA17
' d5 z( a/ }- R( s6 I0 bU33.19 U7.B10
! T1 `0 |- k# ~8 _- j; I3 m, _
*DELETE_GENERAL_RULES* HIGH_SPEED" }) i: |/ r2 X" R! q2 ~/ p
6 U/ y+ W2 p, r% P
HIERARCHY_OBJECT NET:NSRAM2_D3
* ?7 c, P# p/ U9 b: Y2 a
7 }' V, f3 r# \2 \: z0 @*CREATE_GENERAL_RULES* HIGH_SPEED/ P6 `4 g# e+ V3 K3 l' R
- i8 k0 P3 Y0 \1 i7 r) MHIERARCHY_OBJECT NET:NSRAMA92 x9 a- D* a% _
HIERARCHY_OBJECT NET:NSRAMA8) k, a" [1 n. m7 ?8 g
HIERARCHY_OBJECT NET:NSRAMA7
. G* u4 ]) {2 [4 Y7 _5 e5 Y& qHIERARCHY_OBJECT NET:NSRAMA6$ |3 s2 b! B7 r4 u
HIERARCHY_OBJECT NET:NSRAMA5
( n+ z% \" W$ ?% Q0 W+ _2 IHIERARCHY_OBJECT NET:NSRAMA4
5 |- E% b6 ?+ Q- `+ I, a AHIERARCHY_OBJECT NET:NSRAMA3' g H7 Y2 l& y. d, I9 `4 N: Z( C8 v
HIERARCHY_OBJECT NET:NSRAMA2
& h2 G3 G$ ^. e3 PHIERARCHY_OBJECT NET:NSRAMA192 \0 i& u5 C5 G4 ~ q
HIERARCHY_OBJECT NET:NSRAMA189 r/ b4 q+ s, t- `* n" L3 L4 R
HIERARCHY_OBJECT NET:NSRAMA17
' U3 F! R# H8 s4 PHIERARCHY_OBJECT NET:NSRAMA168 `% r& B- _7 X$ L
HIERARCHY_OBJECT NET:NSRAMA156 t B; {/ Q; q+ b/ l
HIERARCHY_OBJECT NET:NSRAMA14
& i" W6 ?" j" w2 D( c6 |HIERARCHY_OBJECT NET:NSRAMA13) {2 W0 @- m5 A. Y/ M
HIERARCHY_OBJECT NET:NSRAMA12
1 r5 Y7 ~5 ^: ~HIERARCHY_OBJECT NET:NSRAMA11
) o, f, M% I- M8 g+ C1 i$ qHIERARCHY_OBJECT NET:NSRAMA10. M- @; z9 C x" v- N. o8 l! D
HIERARCHY_OBJECT NET:NSRAMA1; S1 b& F; d4 e5 {
HIERARCHY_OBJECT NET:NSRAMA0/ V A$ I+ i3 M7 b
MIN_LENGTH 0.000000
/ e; q- ^0 }, O1 CMAX_LENGTH 448000.000000! J+ @8 y4 M S* y) K
STUB_LENGTH 0.000000: g7 ]* u( H" U. b9 x; v
PARALLEL_LENGTH 1000.000000
$ O9 g; B2 j0 C/ ?, {PARALLEL_GAP 200.000000
% f' c- {6 b& j- }* e* a5 PTANDEM_LENGTH 1000.000000
! e( y5 C* ]/ N2 {$ _TANDEM_GAP 200.0000002 }/ a0 v, O- w6 e
MIN_DELAY 0.0000002 D8 U8 v [4 g D4 t2 g
MAX_DELAY 10.000000
6 B2 B* f: u# d" eMIN_CAPACITANCE 0.000000
* V% z) @/ y8 U# @2 x3 T, M0 _MAX_CAPACITANCE 10.0000006 r e/ F# ^* q& f# W$ _
MIN_IMPEDANCE 50.000000* H) ^# F; O$ t8 j9 w4 \
MAX_IMPEDANCE 150.000000
( W" _. V' J5 N# `+ K3 V6 USHIELD_NET OFF& o) z$ d% y! j. g6 S C1 t/ J
SHIELD_GAP 200.000000* _' x8 N) F% |) h2 e
MATCH_LENGTH ON
5 D) I2 B8 p3 A# {MATCH_LENGTH_TOLERANCE 200.000000
* B' j1 [! `- O. k3 I5 kAGGRESSOR OFF2 t+ B" p( e/ c) o
( L8 G4 v9 f+ J+ o- i
*DELETE_GENERAL_RULES* HIGH_SPEED
5 J5 p9 @9 B; }" x9 B
' P U1 J0 D9 O& q, Y7 oHIERARCHY_OBJECT NET:NSRAMA16
c- `, } {6 \+ `) r& b/ jHIERARCHY_OBJECT NET:NSRAMA17
4 x! C! e3 k) f6 i( G
- M# |; d+ d4 Y) p- {" h*REMARK* Deleted pins: 4, Added pins: 8
. ~& R' w0 S; `7 v4 J0 d3 s*END*
- [% L0 t6 ?" _9 b; ] t# L这是完整的结果 |
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