|
|
EDA365欢迎您！
您需要 登录 才可以下载或查看，没有帐号？注册
x
(---------------------------------------------------------------------)
# v! r8 ?' ]# H# y( )
0 v* s" L/ q; e- N/ }& J( Netrev Allegro Import Logic )' E$ \$ g& I \. R, \
( )3 R: s, W; e4 O9 ^' D2 p
( Drawing : tmt.brd )4 M4 a$ j& J8 X0 r
( Software Version : 16.3p004 )
3 N2 q+ I4 D( }( g( Date/Time : Sun Aug 08 12:12:28 2010 )
- I: E% |5 G1 Q' b F2 I" |2 C7 L( )
( ?9 S) S" t. r2 {4 X(---------------------------------------------------------------------): V) F3 y# e' @" d) Z
4 p+ D: i/ t+ s, U1 w e2 }
4 V& Y! V/ y# H( {) Y V
------ Directives ------; H. H" e5 p2 `# D5 K: N
) n# ~, L' u1 g0 N
RIPUP_ETCH FALSE;
3 A9 [, Z6 N( E8 i' R( oRIPUP_SYMBOLS ALWAYS;
5 g' w, Z3 u. F) nMissing symbol has error FALSE;3 A/ T% b2 S A
SCHEMATIC_DIRECTORY 'F:/fuzhitmt';- [. S) e9 R5 O! ^
BOARD_DIRECTORY '';
! u0 z" V1 A' d! ^OLD_BOARD_NAME 'F:/fuzhitmt/allegro/tmt.brd';
- Z& f: M2 P7 q( ^( M+ TNEW_BOARD_NAME 'F:/fuzhitmt/allegro/tmt.brd';' y7 y( \) M; v6 Y- k
, E7 F, N1 r$ f! _- {+ g
CmdLine: netrev -$ -i F:/fuzhitmt -y 1 F:/fuzhitmt/allegro/#Taaaaaa03408.tmp+ t! G# w0 G4 `
: u# |5 n# G) s------ Preparing to read pst files ------8 |7 |7 O+ c2 _* r8 s7 D
! F: N9 Q0 s5 v: I4 u4 N
Starting to read F:/fuzhitmt/pstchip.dat ! t0 W" p3 Q9 d& L: m" H! ^
Finished reading F:/fuzhitmt/pstchip.dat (00:00:00.21), l2 q ^: v3 s3 v1 ]5 B" s2 d
Starting to read F:/fuzhitmt/pstxprt.dat ' K0 N T' M8 A' D+ C) Y
Finished reading F:/fuzhitmt/pstxprt.dat (00:00:00.00)" B3 X$ T: i" a6 v: t
Starting to read F:/fuzhitmt/pstxnet.dat
1 |2 e! B$ {! N+ l! d. Q4 L Finished reading F:/fuzhitmt/pstxnet.dat (00:00:00.01)
% Y* K( J c& ^# P6 a+ {3 b" V( |4 T& w- ]0 a3 C" ~6 _
------ Oversights/Warnings/Errors ------
! S' f3 b4 ?1 U
$ a$ O2 a- F" _9 s4 k; }: [$ y& {9 k Q9 e1 l. t- }+ p
#1 ERROR(SPMHNI-191): Device/Symbol check error detected., [4 i. j# }9 F: N F2 n% ?
8 Q* I' f4 |6 H6 m
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '6'.1 a7 L( a6 o9 N8 W/ f+ f q I5 F
' Z- D- N. p9 L! B
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '5'.
& A; F) @/ m; N, ]" z/ y2 Y* f' M: W" h/ o: I0 ?
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '7'.
" @, h% ^3 t: ]
2 y. K) n1 n. s1 s$ l% R: gERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '9'.' y3 O: r1 R+ r) ]6 L [6 N: p( ^
7 ~3 t3 E2 e) L! T- K2 Y3 |, V
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '10'.; V5 `& G( K3 B# [ T: E0 q* M+ @1 J
: k( L; p% y# q* o/ a: N) E
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '8'.6 \# U# y' ]% U7 h( ^' R8 ?
4 y. Y2 J' H: Z" B, [, v
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '13'.1 e) x' l3 z" ?6 X3 i2 m3 K9 {
6 g1 v6 J2 h0 e$ c* |: yERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '12'.8 e2 c1 Q+ m& W" J
6 F/ P. p5 {- m" W5 X+ VERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '14'.# |9 b! I$ I, l
2 C0 w1 ^5 T9 \0 n5 r: ]
------ Library Paths ------/ k5 [& E$ K6 C
MODULEPATH = .
- A- g' r. b% [ p; V D:/Cadence/SPB_16.3/share/local/pcb/modules
& c8 D8 K1 _9 ~) s
. H& C) W- T; y6 `PSMPATH = . T# R. N. J* E6 w, u- M3 G o
symbols
1 X: @/ B( D2 k1 y5 v8 O% g ..
* E9 [ K4 ~4 z4 i6 V2 B2 o( {; \ ../symbols 1 k) D5 Z& z: Z+ o+ `; i0 y
D:/Cadence/SPB_16.3/share/local/pcb/symbols
1 q& Q" `$ G' C( o" F+ p# P( a D:/Cadence/SPB_16.3/share/pcb/pcb_lib/symbols 3 H( ?, w+ X0 T
D:/Cadence/SPB_16.3/share/pcb/allegrolib/symbols 8 I3 V, i; z( O, H
F:\fengzhuangxinxi\TMT\
* U* A [; O! E1 f2 X* x F:\fengzhuangxinxi\TML\ . O# K3 j, S8 T( O7 T( u9 o6 f3 R x& |
# Y7 V! U+ o2 o$ I, }4 LPADPATH = .
# T( M5 x" T% }6 S+ l symbols " f K7 r) Y) _+ @
..
2 D( [& ]6 c# Y8 F ../symbols + Z) W' }4 o/ @1 e& _
D:/Cadence/SPB_16.3/share/local/pcb/padstacks
5 s! o( @* ^7 t" _% v1 P* N5 F D:/Cadence/SPB_16.3/share/pcb/pcb_lib/symbols / _, I( Z) ]- n3 H9 ~0 C0 E
D:/Cadence/SPB_16.3/share/pcb/allegrolib/symbols 6 V r8 S8 ~, a( Q2 ~4 D4 K. M" t
F:\fengzhuangxinxi\TMT\
8 @: t, q: O- M F:\fengzhuangxinxi\TML\
+ Y# ^* J3 F; O9 @* f( @
7 ]' i Q" y" W, t2 _9 M2 f B' e$ \: `
------ Summary Statistics ------
2 J$ y3 `, s* q# H2 t1 _# d0 b9 q* U! O- J: _; \
$ V7 @1 p2 ?, g% A) ~3 m#2 Run stopped because errors were detected7 C3 n% G& X/ f6 d9 }
( {& A& u0 x2 K3 K8 d( Wnetrev run on Aug 8 12:12:28 2010
$ c3 f4 d# q0 w3 Q% s( Q* g DESIGN NAME : 'TMT'
& m3 x; B6 N' Z3 D0 V$ x PACKAGING ON Nov 17 2009 03:09:433 q# u$ F0 y2 g. d* Z# g. f
1 R" Y% r6 r& v9 K" \5 m
COMPILE 'logic': q$ Q. C, Y1 S$ E' r7 V
CHECK_PIN_NAMES OFF
% ~) O# Z7 c+ I! ^/ _$ r. u2 ? CROSS_REFERENCE OFF J+ _# v+ I) ]
FEEDBACK OFF
* o4 u, z9 T6 y9 V: B INCREMENTAL OFF
- s6 O/ [4 H# V, O# t: u: f. u2 B INTERFACE_TYPE PHYSICAL
8 s/ s9 H" u* b) A* O MAX_ERRORS 500
, s; Q$ m: f% m+ V- W4 @+ b, @ MERGE_MINIMUM 55 R3 K9 H! O8 B0 I0 h+ _+ _
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'- a* y9 l% z3 h6 I1 m P
NET_NAME_LENGTH 24* U% |6 s, Y) R6 }, _
OVERSIGHTS ON
4 g! t0 ?' G' H+ g# H" g REPLACE_CHECK OFF1 {8 w& I$ L. z0 X" t# [0 d
SINGLE_NODE_NETS ON
, ~* a: |( G; M% [ SPLIT_MINIMUM 0% C, b% w E/ g( }$ m; m3 f
SUPPRESS 20
* _6 T9 N- M' z+ o1 j* j; Q% ] WARNINGS ON
8 T8 R- y) ?2 ]
1 b" e, x2 N' R5 i4 V$ ] 2 errors detected
( {3 F3 J4 B$ R& C! QNo oversight detected7 `4 t. M9 }: v" X) L0 f' e) O
No warning detected) B: ~0 v9 d8 e( X
$ J7 r3 _- ^, i$ q8 n5 n |9 w
cpu time 0:02:361 t0 L3 d5 ?' Y$ [& @) Q
elapsed time 0:00:02 |
|
/1 
发表于 2010-8-8 12:14
QQ好友和群
QQ空间
腾讯微博
腾讯朋友
微信
收藏
支持！
反对！
楼主
