更新如下
5 d+ @2 L; w4 R5 }$ f% A$ W, ]DATE: 01-15-2016 HOTFIX VERSION: 063
5 _4 E) T& a+ j! [6 H+ v- ]5 u% ~===================================================================================================================================1 I6 l( G c$ S; K
CCRID PRODUCT PRODUCTLEVEL2 TITLE/ g. g% P( Q& ^ G5 Y7 P5 F
===================================================================================================================================) B& R3 p9 f) K6 ]' R k
1472414 ALLEGRO_EDITOR SCHEM_FTB netrev changes pin-shape spacing rulein constraint region
) U6 K% H( F/ m8 h3 s7 ^" J1494194 CONCEPT_HDL CORE Random display of the'PHYS_NET_NAME' property in hierarchical designs; _1 V: f, Z1 w/ n
1500190 ALLEGRO_EDITOR EDIT_ETCH Snake Router Creates Line-to-Line DRCs
. ?( W7 q7 U* ?! R P) C) K1501093 SIP_LAYOUT OTHER Package design variant showswirebonds connected to a die which is not part of the variant
?8 p. j4 d' h2 b X1509184 ALLEGRO_EDITOR DATABASE BB vias in mirror have terminal padssuppressed by artwork
4 s+ Q0 l5 U/ R0 ^5 o1511397 SIP_LAYOUT TECHFILE Tech file exported from release 16.5cannot be reused in SiP Layout in 16.5 or 16.60 Z( Z/ J2 u1 T. @/ Q+ L
1511744 ALLEGRO_EDITOR OTHER Allegro PCB Editor removes propertyfrom component instance0 }$ C! F1 n$ ~+ ?- t
1511761 SIG_INTEGRITY OTHER Allegro PCB Editor crashes onrunning the cns_show command.
5 X V* v6 F0 Z6 Y* y) K, t( u1511787 ALLEGRO_EDITOR INTERFACES IPC-2581 not exporting overlappingshapes correctly.
, C, { v! S1 N5 s! u( C* F# c E1512071 ALLEGRO_EDITOR OTHER The color of 'SHAPE PROBLEMS'subclass is reflected in the color of 'NCLEGEND-1-4' subclass when executingPDF out
) ~* [9 V1 _) u7 j1513085 CONCEPT_HDL CORE NC pins combine with NC_1 androuted as one net in Allegro PCB Editor4 V! B+ C4 _5 p: k& a. Z* H
1514469 CONCEPT_HDL CORE Unable to get rid of an underscorefrom the PHYS_NET_NAME property
: ]( ?& x2 b* L& y2 \/ K: H& C1515318 PCB_LIBRARIAN IMPORT_EXPORT Import Pin Table: 'CTRL + C' and 'CTRL + V'not working correctly
8 R3 a0 Y* a% ^4 L1516093 ALLEGRO_EDITOR PADS_IN Pads library translator does nottranslate slot orientation
0 S' S: h- B6 h- [, }2 X: m7 A6 p1517351 CONCEPT_HDL CORE Genview does not update anexisting split symbol0 d6 Q4 h; p/ e8 o* h, s
1518032 CONCEPT_HDL SECTION How to get rid of error 'SPCOCN-2009- Symbol has the SEC property but the required SEC_TYPE property is missing.'
) f1 G$ m( v5 J" B- i- f+ _1518724 PCB_LIBRARIAN PTF_EDITOR PTF Editor is not saving changes% r" x- ]+ A1 H1 f$ W* }" q
1519518 CONCEPT_HDL OTHER Genview does not generate splitsymbols
, |+ @+ H# L. u$ G( ~3 W1519623 CONCEPT_HDL CORE Differential pair added to aNetClass does not display 'NET_PHYSICAL_TYPE' on the canvas
1 y- U8 \. \2 N8 y4 }8 P1520207 CONCEPT_HDL CORE Genview crashes after renamingports
/1 
发表于 2016-1-19 20:33
QQ好友和群
QQ空间
腾讯微博
腾讯朋友
微信
收藏
支持！
反对！
