第一片FPGA芯片，XC2064发布30年

stupid

The Xilinx XC2064: the ur-FPGA — a 48-pin DIP snatched from the mists of time for a 30th power-on anniversaryby sleibso 09-15-2015 09:25 AM - edited 09-15-2015 04:01 PM(2,245 Views)
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Xilinx was founded in early 1984 but the company’s first FPGA—the XC2064—was announced on November 1, 1985; that’s nearly 30 years ago. This ur-FPGA was the brainchild of Xilinx co-founder Ross Freeman; it was designed by Bill Carter; fabricated by Seiko in Japan; and marketed by the world’s first fabless IC vendor—Xilinx—as envisioned and co-founded by CEO Bernie Vonderschmitt. The first working devices powered up in September, 1985. Coincidentally, that’s 30 years ago this month. I discovered that it’s surprisingly hard to find one of these early, early programmable-logic devices at today’s Xilinx HQ. It’s surprisingly hard to find someone who even remembers seeing one of these chips in a package.

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If I were Doctor Who, I’d jump in my TARDIS, go back in time 30 years, and pick one up. Alas, I’m not Doctor Who but I do have a TARDIS of sorts.

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The Internet, this blog, and eBay are my TARDIS.

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I clicked over to eBay a couple of weeks ago, did a quick search on “Xilinx 2064,” and bingo. There was an unused 48-pin DIP with the unmistakable Xilinx logo for sale by a vendor named “ACP Surplus” in Santa Ana, California. The price was $5.97 plus $5 shipping. (Orignal unit price in 1985: $55 to $80.) The eBay product photo showed a date code from early in 1988 but it’s still the original Bill Carter design, give or take a production tweak or two. A few more mouse clicks and the order was placed.

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Here’s the entire block diagram of that original Xilinx XC2064 FPGA:

Xilinx XC2064 “Logic Cell Array” Block Diagram

Note that the configurable logic blocks (logic cells) form a regular 8x8 array—thus the original name for the device, a “Logic Cell Array.” Today, we know the descendants of this ur-programmable-logic-device as FPGAs.

Comparing the specs of the original XC2064 FPGA with the largest FPGA being shipped today, the 20nm Xilinx Virtex UltraScaleXCVU440, is an eye-opening experience. Here are some key macro-level comparisons:

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	Xilinx XC2064-33 48-pin DIP	Xilinx XCVU440
Logic Cells	64	4,407,480
CLB Flip-Flops	64	5,065,920
Total Block RAM	0	88.6Mbits
DSP Slices (GMACs/sec)	0 (0)	2880  (4268)
Maximum Number of I/O Pins	38	1456
Differential Multi-Gigabit Transceivers	0	48

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We’ve definitely made some progress in 30 years. Today, you can instantiate complex, sophisticated systems entirely in one of today’s FPGAs and many Xilinx customers do.

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My miniature time capsule arrived yesterday by TARDIS post from Southern California:

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Xilinx XC2064-33 in a 48-pin DIP

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I certainly don’t plan to plug this antique chip into a system. Instead, I’m going to store it next to a few other artifacts in my warehouse.

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Note: If you’d like to read about the founding of Xilinx and the development of the world’s first FPGA, see last year’s blog post “Happy 30th birthday, Xilinx! (Free downloadable origin story, courtesy of SemiWiki’s new Fabless book)” where you can download the Xilinx chapter from Daniel Nenni’s and Paul McLellan’s book “Fabless: The Transformation of the Semiconductor Industry.”

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金志峰

很大程度这得仰仗工艺制程的发展