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http://pan.baidu.com/share/link?shareid=437717&uk=3826038294
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DATE: 05-24-2013 HOTFIX VERSION: 010: r5 K u" c. I& F
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CCRID PRODUCT PRODUCTLEVEL2 TITLE
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# s; r$ L$ D$ o6 P" l1084716 ALLEGRO_EDITOR OTHER Getting an MPS error when updating CM from SigXplorer8 g- x" a; \8 o3 D1 S
1111430 FSP CAPTURE_SCHEMATI Auto-resize the schematic sheet so that hierarchical block fits within border
3 q% @3 {9 H( I0 P1119007 CONCEPT_HDL CORE PDF Publish of schematic creates extremely large PDF files' e7 m9 h2 q8 u# s; e- r
1121020 FSP MODEL_EDITOR Cut-Paste from Excel causes empty cell in Rule Editor
! J0 u) S' T7 b3 _6 H S1124610 PSPICE SIMULATOR Attached design gives "INTERNAL ERROR -- Overflow" in SPB116.60 i; n- u/ o' a5 \) |: f
1125330 FSP CAPTURE_SCHEMATI FSP generates OrCAD schematics with components (Resistors) outside page border
* e) Q4 f( ]; ]* i0 G, ^9 c1131775 ADW LRM LRM error with local libs & TDA
5 a9 S1 B. z6 s3 a3 N$ D1131868 CONCEPT_HDL CONSTRAINT_MGR Many net-class constraints "fell off" the design after uprev and Import Design of GEP4& c: U ?4 S& u I+ \
1132080 ALLEGRO_EDITOR PLOTTING Size of the logo changes after File > Import > Logo" a7 d2 V0 T: c4 l3 j1 I e
1134956 SPECCTRA HIGHSPEED Route Automatic fails with error when Impedance rules are turned ON in Allegro CM.$ s% ^8 t/ b# K1 |* P
1135548 SIP_LAYOUT SHAPE This design shows two areas with shape shorting errors that should not occur9 C, ]2 `! b6 f9 _* R) Z
1138312 ALLEGRO_EDITOR MANUFACT NCROUTE is not generated for filled rectangle slot ?
5 @$ B# y4 J) o% a; g1 t1139433 ALLEGRO_EDITOR GRAPHICS embedded netnames not displayed or getting very small upon panning after exiting 3D Viewer.
f$ ~5 \! V3 i' q1139509 CONCEPT_HDL CORE The LRM update changes npn device to resistor# Y) }& a' [3 }2 z7 C0 h7 a* Z: Y& G
1140752 ALLEGRO_EDITOR PLACEMENT Moving a place replicate module crashes allegro$ |9 ?; Z1 @0 N; n& U# d
1141314 SIP_LAYOUT SYMB_EDIT_APPMOD Design will lock up after changing the border using Edit Boundary in Symbol edior mode.
5 k5 L2 ?$ N& t! S/ S' p% p- G1141751 ALLEGRO_EDITOR INTERFACES Allegro Crashes with Export IPC2581.1 }* C# N8 q) T7 n1 H. j
1142478 CONSTRAINT_MGR INTERFACE_MAPPER adding constraint to netgroup causes CM & PCB SI to crash
- o! R% y8 y5 J1142884 ALLEGRO_EDITOR OTHER Boolean type user defined property doesn't export to the PDF
8 |' X# j* `$ c: V+ k: h' T6 V1143199 SIP_LAYOUT DIE_EDITOR Enable bump remastering, H8 W' ~8 Y8 S. M0 p! k) |) m3 {1 R0 z
1143654 SIP_LAYOUT DIE_EDITOR Add X&Y offset when adding or moving a pin in die editor! x* p! q: Y0 }2 E) j' F/ b
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发表于 2013-5-25 09:24
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