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--------------------------------------------------
; S; P* C7 ^2 ^' m; DChecking Schematic: FPGA+ J3 r3 z0 Q# N
--------------------------------------------------0 C+ l) N1 T2 t* r1 m9 ]; Y
Checking Electrical Rules ; L" `9 a: K: }; h: h. r( o
! H, Z0 s0 W- h6 `. s6 ^2 NWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V21 Bidirectional Connected to Output Port: FPGA, PAGE-A1 DR FPGA END (4.90, 2.20)
! d' y6 k" N+ t+ w3 N& aWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AA19 Bidirectional Connected to Output Port: FPGA, PAGE-A1DR FPGA END (5.00, 4.80)
8 y$ e0 p( L4 d# n( n7 a' Y( @WARNING [DRC0004] Possible pin type conflictWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_W15 Bidirectional Connected to Output Port: FPGA, PAGE-A1DR FPGA END (2.50, 5.30) U1,IO_VB7N0_Y14 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.50)
( B$ I- D m9 ]- YWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V20 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.10) % {9 ~; J. _7 g
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_V22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.30) ) g$ m! d& B4 u7 W7 T2 c& d
WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_W22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.70)
' H$ K0 K( E) ]6 sWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_W16 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.40)
6 d. C' n' u7 {8 m( tWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AB18 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 5.60)
1 Z. B7 [8 \: x8 }WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_Y17 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (2.50, 5.60)
; D& K$ C" @! n5 _WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_Y21 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 3.10)
3 R% i9 Z4 Z( }WARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_Y22 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 3.20) " j8 f1 P5 m4 e% @# ~' e2 M
WARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AA18 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 4.70)
; {- v' B. T# X7 l; cWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_W21 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 2.60)
. E" |' o, }1 cWARNING [DRC0004] Possible pin type conflict U1,IO_VB7N0_AB19 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (5.00, 5.70)
7 @1 |- _) ^ ?3 B. B2 SWARNING [DRC0004] Possible pin type conflict U1,IO_VB6N1_R17 Bidirectional Connected to Output Port: FPGA, PAGE-A1:DDR FPGA END (4.90, 1.70)
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发表于 2011-12-9 13:52
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发表于 2011-12-10 20:40