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(---------------------------------------------------------------------)
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( Netrev Allegro Import Logic )( R( o: G2 f; A+ Z& h+ Z) w
( )
: N. I/ y; Z# W) z$ V3 s( Drawing : tmt.brd ); N& w* |8 `" b G8 \( i# l$ Q8 v* b
( Software Version : 16.3p004 )' h6 \4 X5 {3 x! z; c
( Date/Time : Sun Aug 08 12:12:28 2010 )9 w' c/ ~7 c" Z; p$ ]
( )# G- h9 `6 Y8 C9 C; W- O$ R8 Y
(---------------------------------------------------------------------). Z7 u5 q& _, E+ ]2 k) n
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$ @5 D$ Q2 Q" Z) Z------ Directives ------
/ a! B1 w1 ]$ _
$ p. F5 C" ~ x; eRIPUP_ETCH FALSE;
& @% @- c! |6 u0 [ Q+ aRIPUP_SYMBOLS ALWAYS;
2 r/ U3 w- b1 ^4 Z: V# hMissing symbol has error FALSE;8 s& A0 L, E/ t$ P8 N3 u+ Y g; U
SCHEMATIC_DIRECTORY 'F:/fuzhitmt';
$ j1 N8 m& v$ v, O- Y) ^BOARD_DIRECTORY '';
+ _. @& P; F! uOLD_BOARD_NAME 'F:/fuzhitmt/allegro/tmt.brd';
+ v, f* K& B$ sNEW_BOARD_NAME 'F:/fuzhitmt/allegro/tmt.brd';0 T0 X+ C; x7 H( L# }7 Y+ O
& s; f' o, k% {$ N" \9 ]4 p* S) UCmdLine: netrev -$ -i F:/fuzhitmt -y 1 F:/fuzhitmt/allegro/#Taaaaaa03408.tmp
7 Z3 Q+ i% ^; Y7 x
9 Q6 J' G% m8 \! j------ Preparing to read pst files ------
% y5 ?: _! w/ o+ I+ s {7 y$ c' p! t' o7 d' h6 t& Z; B
Starting to read F:/fuzhitmt/pstchip.dat # L1 k& M z, c/ R
Finished reading F:/fuzhitmt/pstchip.dat (00:00:00.21)
& }/ |0 j0 K n+ i" a4 aStarting to read F:/fuzhitmt/pstxprt.dat & u4 n% y* G6 T# [* i+ C2 l [2 Z9 S
Finished reading F:/fuzhitmt/pstxprt.dat (00:00:00.00)( S" e: ]: w" J% s8 U) {1 }
Starting to read F:/fuzhitmt/pstxnet.dat
0 O" r; Y6 }4 |# {8 {( h% ~ ~ Finished reading F:/fuzhitmt/pstxnet.dat (00:00:00.01)
0 T W9 h0 a, W, _: T3 M3 T9 L0 |) v5 P% j- W: ~4 X
------ Oversights/Warnings/Errors ------. t' c. A. `7 h2 I
5 y% j3 F; q7 ~) j5 _3 @. r& {- R7 ^
/ a d O# k8 i
#1 ERROR(SPMHNI-191): Device/Symbol check error detected.
. f# u6 t* j4 Q& h
9 }: {# M; @" [ ?% }6 r6 ^$ W8 @ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '6'.
4 A: \) `& ?7 w! J% p# }6 [( I8 j3 r$ D/ f" z; j! c4 B X; r
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '5'.
: O; y, N: g+ c1 l: \2 G$ p- R+ U8 |7 h& V6 f$ U
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '7'.% L8 s% ~8 [. k, A% s
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ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '9'.' [) T* z. y& f7 a7 G, u6 c5 e
6 b# `# ^6 a4 X% G- E4 `ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '10'.# c: @/ S- M1 E! J! N2 E
6 u7 K5 T, ?0 ^0 b* B- E+ ]4 a g
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '8'.
% n( k' [: @! `; W
7 P( i: J5 r' |ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '13'.
! x, I( `, _2 B9 q; _* B5 U9 X, H+ R1 L
ERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '12'.
. W' Z3 l: Q6 _0 x+ g( E
- L6 N* p" i+ d xERROR(SPMHNI-195): Symbol 'SOT23-3' for device '2N6988_SOT23-3_2N6988' is missing pin '14'.
\! [1 }1 K, L1 X3 s: ~/ l9 H6 Y8 l2 A: G) T f
------ Library Paths ------; u9 a; x7 Y, q% y
MODULEPATH = .
8 W e: ?- _$ p( K% Q' Q D:/Cadence/SPB_16.3/share/local/pcb/modules ! q4 A- l+ f7 R6 N
9 H2 u' @& Y; p. d& M- g* nPSMPATH = . ' `( B* H @- x: x
symbols $ s9 ]- @# O. K4 u7 ?
.. ) \, B- `6 w4 @0 u2 S5 ~! L3 Z
../symbols 0 s9 P2 E1 u7 }) f b9 K/ r8 t1 ^
D:/Cadence/SPB_16.3/share/local/pcb/symbols 8 p+ }% B) C8 Y) i2 {
D:/Cadence/SPB_16.3/share/pcb/pcb_lib/symbols 4 X9 R7 B" H7 O
D:/Cadence/SPB_16.3/share/pcb/allegrolib/symbols
( a6 y. ?0 X2 K' ^ g/ V8 q: ] F:\fengzhuangxinxi\TMT\
3 C5 E" Z( k7 l$ U* f6 I0 r# ] F:\fengzhuangxinxi\TML\
1 _: G- r7 R" G# j
: F. j [3 [1 J2 M$ H8 U1 w# `PADPATH = .
, d* H: ~! ]- `" T' L9 X+ ` symbols 3 R% D% f# Z @+ A
..
* r! e& L4 h0 ~" L- O# C4 V ../symbols ! c0 q" S; o0 C) s4 r5 w8 k! |
D:/Cadence/SPB_16.3/share/local/pcb/padstacks 6 Z7 G* U" \0 Q! b$ Z6 C1 x2 L
D:/Cadence/SPB_16.3/share/pcb/pcb_lib/symbols # ^7 W0 y9 e: B" O! G5 o
D:/Cadence/SPB_16.3/share/pcb/allegrolib/symbols
0 r: z j) N w F:\fengzhuangxinxi\TMT\
3 E4 X* o( p: W n F:\fengzhuangxinxi\TML\
4 F9 A: u$ g, e! _/ o! W1 a3 l& J: [+ o
+ I, S4 o6 I) I5 f3 v! D------ Summary Statistics ------6 O3 a5 Y5 J5 n' M1 i
( F$ v/ X/ S# o4 l5 u1 j7 H5 \
7 ]. b( ]: |. k' {7 j8 d" W/ D#2 Run stopped because errors were detected# q4 y. P w& O, Y ^9 ?
4 D2 @4 z9 ^8 i# anetrev run on Aug 8 12:12:28 2010
( s x. v5 E' O& E' s DESIGN NAME : 'TMT'; e& F4 C9 O, {: Y
PACKAGING ON Nov 17 2009 03:09:43( o" _5 t, q' x( t
3 Q0 N+ h3 G' F9 f) U ?/ N
COMPILE 'logic'
) L2 C2 W7 M; s4 f CHECK_PIN_NAMES OFF. `0 W4 e/ v4 M% b1 W, |4 {, |$ \
CROSS_REFERENCE OFF( B% E0 M `& Y/ w* K. Y6 ?! R
FEEDBACK OFF
' O* ?7 H" N' P0 j" x6 C$ z INCREMENTAL OFF
- _& A; S" I# o5 s( L1 m) _ INTERFACE_TYPE PHYSICAL6 e( m. e2 I$ v& U9 w2 b
MAX_ERRORS 500
+ M% f( Z6 E+ ?/ k MERGE_MINIMUM 5 y! v' J. [" `. M" [3 E
NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|'# \7 S1 [$ s8 N* B
NET_NAME_LENGTH 24
* E, b' a$ g: r OVERSIGHTS ON; }2 Y( [" C1 k9 U T
REPLACE_CHECK OFF
+ g/ \, ~" G9 K- h; B SINGLE_NODE_NETS ON
. I$ N$ ^; U2 t7 X9 Q6 b2 w SPLIT_MINIMUM 0" z. H2 O9 ^. h2 H6 k' S0 w
SUPPRESS 20
2 l9 }/ W0 a* s. V- v- Q WARNINGS ON( [/ E0 y2 Q* A: s# M
( L& Y8 } j5 o3 [2 E 2 errors detected
% R2 V8 j5 u. u3 ~+ H, L& NNo oversight detected! n2 [7 c8 s; R" T2 ~/ K
No warning detected- P# W7 d) o7 {, {/ d0 u
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cpu time 0:02:36
3 i4 Z/ U! L* W1 qelapsed time 0:00:02 |
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发表于 2010-8-8 12:14
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