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本帖最后由 紫菁 于 2017-9-14 11:21 编辑
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下面链接是Cadence SPB16.3及最新Hotfix下载地址,需要的可以下载!0 X: l x+ w- f( S& c, m) ~
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Hotfix057更新的内容如下所示:
8 g$ r7 Q& b( d0 g0 e CDATE: 12-19-2012 HOTFIX VERSION: 057; s* w4 h7 z4 v) b3 F3 y& n
===================================================================================================================================
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% p! w; o9 N \4 K$ q- o1080193 SIG_INTEGRITY ASSIGN_TOPOLOGY View Topology freeze during the extraction of the net connected to resistor network.
, R* |2 z) a: }0 \1082509 ALLEGRO_EDITOR INTERFACES Export DXF in the 16.3 S056 roatate some pins.
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8 J: Y3 K7 \1 JDATE: 12-7-2012 HOTFIX VERSION: 056
7 ?0 S" c; H: [8 S0 S1 ~' W" |===================================================================================================================================8 t& p2 w4 z2 q* }
CCRID PRODUCT PRODUCTLEVEL2 TITLE& }, w8 ]# l& z' ^8 U
===================================================================================================================================
$ u3 `/ V2 P% h* d. S825813 CONCEPT_HDL CORE HDL crashes when copying a property from one H block to other' @/ t/ X+ m/ r8 O7 \
871886 CONCEPT_HDL CORE Browse button in Signal Integrity window of DE-HDL option causes program crash
/ B2 C5 } R7 M/ |3 v871899 CONCEPT_HDL CORE 'Multiple:' column of Grid window in DE-HDL option is too wide4 _5 M' D1 u, q" |5 w! h
873917 CONCEPT_HDL CORE Markers dialog is not refreshed$ y" ?1 q7 ?3 Z1 }! J; t
887887 CONCEPT_HDL CORE Option to find unconnected Pins/Nets with DEHDL L License# [: g! U0 P' z/ t: o3 R7 J# h
892857 CONCEPT_HDL CORE packager treats R? as a unique reference designator7 _6 c5 [4 M L+ T D( f6 ~
1075587 CONCEPT_HDL PAGE_MGMT Unable to insert page in schematic
! k7 U$ C' t" p/ t' T1078682 ALLEGRO_EDITOR DRC_CONSTR Unaccetable slowness with Slide |
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