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# W+ l! C! s& D; N3 t*PMEG3050EP
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! e2 M8 L8 @3 Z/ K% ?( F; x*NXP Semiconductors! l" g5 K; a5 `+ k# t" A7 f
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: W& g5 ^& A$ O7 }* r*MEGA Schottky barrier rectifiers
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2 B% ^8 V$ P* s2 h% I% }7 R8 x*IFSM = 70A @ tp = 8ms8 f. J/ b+ t& ~& I; y. V2 h: m
*VF = 360mV @ IF = 5A
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*Package pinning does not match Spice model pinning. R# P, ] w+ B; c. c Q$ t
*Package: SOD128
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* U: u! z0 P6 h*Package Pin 1: Cathode 0 K7 r+ r- W( s8 C
*Package Pin 2: Anode
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& j6 C4 U% ]. l: q. G*Simulator: SPICE2
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1 }7 z2 O0 p" s.SUBCKT PMEG3050EP 1 2
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* The resistor R1 does not reflect r( J$ u& I0 R# j
* a physical device. Instead it
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* mode of operation.
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R1 1 2 4.936E+7
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; ]8 w) B* t9 H% A.MODEL PMEG3050EP D & ?' ?6 i8 \. q9 A
/ G. Y% U- s# J' a+ IS = 0.0001624
, r; T( C; L' @6 ]; A) b: E3 ?+ N = 1.012 1 C* H; q6 e: T4 E3 v" f- W9 c1 f
5 J2 I: g. ?3 \1 \6 _+ BV = 33 8 H( \2 J2 X( X) u0 p; g
+ IBV = 0.02
2 q; X% V" B+ z: X+ RS = 0.00798 3 ]4 j. W2 m0 d ^5 r. |
+ CJO = 1.496E-009 . K w1 z5 q2 U: t; H$ Y: ]
1 \% f0 L0 `5 g) h- w1 i, ?+ VJ = 0.3243 ) N2 F9 I) I( J/ ]/ L: b
+ M = 0.503 ( B3 u! l. c5 W j6 ^9 }! E
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+ FC = 0.5 ! F0 [) J) B0 d
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+ TT = 0 * U q( k ]; I* Q; x7 L/ \
5 B, e1 k, ~6 U& |7 X: E+ EG = 0.69
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+ XTI = 2 * k* z0 A$ G9 J5 ?) [: L
.ENDS
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这是NXP官网上PMEG3050EP.prm的spice模型
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这是仿真电路
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这个是仿真结果5 m1 s9 @9 s; ? d( M7 s# w
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这是datasheet上的图示* \6 U* t! o& p, u. O2 Z5 y
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PMEG3050EP.pdf
(148.8 KB, 下载次数: 3)
这是datasheet0 I4 D- l. a) ~. M
PMEG3050EP.zip
(40.97 KB, 下载次数: 11)
这是官网上spice-model- Z# a. q9 a! O+ V' i2 H
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NXP官网上的模型,仿真与datasheet上不一致,请大家指点一下. D* {9 ]* ^0 n) P9 R" ~7 V4 ?
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