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发表于 2014-10-20 11:59
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E+ h ^) b9 w- Q4 ^$ r' a& Q' [DATE: 10-10-2014 HOTFIX VERSION: 037
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$ J$ o! ]9 t6 }5 e8 O, y1314031 CONCEPT_HDL CORE GenView should automatically refresh the page where the block symbol has been instantiated l& i5 Q" l' q% R& l6 n9 \2 s
1318575 SIG_EXPLORER SIMULATION Display Parasitic on Wirebond (selecting the second one) crashes APD
6 K8 N. z7 ?. b' V: W1 i9 M1319258 allegro_EDITOR INTERFACES Enhance IPC-2581 so that the rotation of pad shapes is defined at the LandPattern definition and Pin elements levels, b# k2 s; k# P* x
1320054 ALLEGRO_EDITOR INTERFACES IPC2581 Import Stackup q2 w% T, j. S h4 G" j
- S) K1 g- R5 x# `1320467 CONCEPT_HDL CORE Incorrect directives in cds.cpm for nconcepthdl (cont.): _( M) b8 N, G
. [5 [ q9 o8 O1 o; x; R; G* @; T1320878 ALLEGRO_EDITOR EDIT_ETCH Allegro crash when using scribble& w% K/ P: H) ?
0 B. ]" X9 A( k: a, F& e) l0 {. `' k1321319 ALLEGRO_EDITOR INTERFACES Step Export has wrong size
9 L, [( H/ H$ F5 {/ x1322394 CONCEPT_HDL OTHER Packager runs without errors even when the DEHDL schematic pages are corrupt., V* t' r+ o4 G; _% f5 h
3 B$ f2 ~& M( g ~4 ?1323892 CONCEPT_HDL CORE The SI_MODEL_PATH should not write to $HOME/pcbenv/env
5 a4 g' V) p; _# z4 f8 U1324438 SIP_LAYOUT EXPORT_DATA SiP Layout - netlist spreadsheet, Error on exporting a spreadsheet on design file& p9 F# W/ @1 {8 G5 j' k0 t$ [- A4 i# a1 E' y! B
1324533 F2B PACKAGERXL Export Physical fails - pxl.exe has stopped working! S0 w! W( A5 i' n
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发表于 2014-10-15 09:56
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