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本帖最后由 pzt648485640 于 2015-10-18 11:10 编辑 1 z& \+ u; y' F6 U3 p
: X, d) G- f( {: j# B& j由于17.0作为过度版；固未做太多更新；应坛友需求所发1 e: Z: T, Z5 y2 a9 i* c( b6 U
DATE: 09-04-2015 HOTFIX VERSION: 006
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CCRID PRODUCT PRODUCTLEVEL2 TITLE" z1 J$ s* t0 ?4 m. U9 T& L
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# |/ V/ a3 T+ N4 p: b o1458272 SIP_LAYOUT ASSY_RULE_CHECK File size increases by factor 4 after ADRC check on a specific customer design- w, s, p* M- {$ J. z. u8 z
1460178 ALLEGRO_EDITOR INTERFACE_DESIGN PCB Editor crashes on deleting vias or nets
1 A' _) R% d3 {7 w3 p! q7 j1461387 SIP_LAYOUT SKILL axlDBRefreshID(nil) removes ID from assigned variable
) y1 Q" y* ^. X- h; z" Y1461625 SIP_LAYOUT ASSY_RULE_CHECK Core polygon routines are not creating proper polygons; ADRCs reported: "acute angle", "exposed metal to exposed metal"
" o! V2 C4 d* @0 F1464771 SIG_INTEGRITY OTHER Application crashes when extracting Diff Pair topology from Constraint Manager. x# K# \& Y: F# ?. S
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http://pan.baidu.com/s/1gdhBNzl& q9 ?- T( v0 h6 C1 X% \+ Z
1 D _: y0 Y% H5 Y: S4 }直连SPB17.0$ T% @1 j+ n" C( ?( C
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发表于 2015-10-18 11:07
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，果然来了
