一个12V转11V的降压模块输出不稳定总在9~11V之间变化是什么原因

laobei1986 · 发表于 2013-5-3 21:25

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一个12V转11V的降压模块输出不稳定总在9~11V之间变化是什么原因？若去掉输出滤波电容，输出9.8V稳定，加上电容后，又在9~11V之间变化，请问这是什么原因。

bluemare · 发表于 2013-10-27 15:38

在上反馈电阻（Rfbt）上，并一个电容（前馈电容）

xiaoyangren · 发表于 2013-10-29 13:13

不懂硬件设计，真不知道怎么设计原理

timerc · 发表于 2013-10-28 08:41

不能串联两个二极管来降压么

kevin890505 · 发表于 2013-5-3 22:53

没有负载吧

laobei1986 · 发表于 2013-5-5 12:57

本帖最后由 laobei1986 于 2013-5-5 17:34 编辑

kevin890505 发表于 2013-5-3 22:53 & l' d4 h0 x" {, K I5 n% q
没有负载吧

没有负载，可是没有负载也不应该是造成电压不稳定的原因吧。
原来的输出电容是47uF，后来换了个1uF的电容，输出电压稳定在10.3V，请问出现这种现象的原因。

liangjiatian · 发表于 2013-5-6 15:45

不知道你这个模块结构是怎样的！！

qiangqssong · 发表于 2013-5-6 17:11

加上电容后是不是电路振荡了?楼主可以测一下输出电压波形

zhixueyiye · 发表于 2013-5-6 20:32

给出电路图吧

fyh629 · 发表于 2013-5-7 13:24

Q=C*U

laobei1986 · 发表于 2013-5-7 19:04

qiangqssong 发表于 2013-5-6 17:11 - S3 x5 J G0 P7 W& x/ N1 h
加上电容后是不是电路振荡了?楼主可以测一下输出电压波形

是的，加上输出电容后电路震荡，输出电压在11.5V到9V之间震荡。请问这是什么原因

laobei1986 · 发表于 2013-5-7 19:05

liangjiatian 发表于 2013-5-6 15:45
1 d& v" t1 t2 {8 U5 ~: V不知道你这个模块结构是怎样的！！

原理图以放在8#，请帮忙看一下吧。

laobei1986 · 发表于 2013-5-7 19:06

zhixueyiye 发表于 2013-5-6 20:32
) i3 ^( Z5 q$ y- ?* H; W$ N给出电路图吧

原理图已放在8#，请帮忙看一下吧。

liangjiatian · 发表于 2013-5-7 19:20

VSENSE 电压多少？稳定吗？

liangjiatian · 发表于 2013-5-7 19:21

laobei1986 发表于 2013-5-7 19:06 ( G8 J! f, }" Z' }6 Q
原理图已放在8#，请帮忙看一下吧。

VSENSE教电压多少？稳定吗？

kevin890505 · 发表于 2013-5-7 20:53

1,后级加个1K电阻试试，不知道你的DCDC是什么时候的
2，不行的话给反馈环路加个20pF的前馈电容，就是和Rfbt并联
3，检查芯片的地焊接是否良好，以及PCB的FB回路和输出地回路是否OK

超級狗 · 发表于 2013-5-8 08:54

本帖最后由超級狗于 2013-5-8 12:50 编辑

看一下芯片資料中的這一段，是不是輸入和輸出的電平差太小？（應用是 12V 轉 11V）

Low-Dropout Operation and Bootstrap Voltage (BOOT)
The TPS5401 has an integrated boot regulator, and requires a small ceramic capacitor between the BOOT and PH pins to provide the gate-drive voltage for the high-side MOSFET. The BOOT capacitor is refreshed when the high-side MOSFET is off and the low-side diode conducts. The value of this ceramic capacitor should be 0.1 mF. A ceramic capacitor with an X7R or X5R grade dielectric with a voltage rating of 10 V or higher is recommended because of the stable characteristics over temperature and voltage. To improve dropout, the TPS5401 is designed to operate at 100% duty cycle as long as the BOOT-to-PH pin voltage is greater than 2.1 V. When the voltage from BOOT to PH drops below 2.1 V, the high-side MOSFET is turned off using an UVLO circuit, which allows the low-side diode to conduct and refresh the charge on the BOOT capacitor. Because the supply current sourced from the BOOT capacitor is low, the high-side MOSFET can remain on for more switching cycles than are required to refresh the capacitor; thus, the effective duty cycle of the switching regulator is high. The effective duty cycle during dropout of the regulator is mainly influenced by the voltage drops across the power MOSFET, inductor resistance, low-side diode, and printed circuit board resistance. During operating
conditions in which the input voltage drops and the regulator is operating in continuous conduction mode, the high-side MOSFET can remain on for 100% of the duty cycle to maintain output regulation, until the BOOT-to-PH voltage falls below 2.1 V.

Attention must be taken in maximum-duty-cycle applications which experience extended time periods with light loads or no load. When the voltage across the BOOT capacitor falls below the 2.1-V UVLO threshold, the high-side MOSFET is turned off, but there may not be enough inductor current to pull the PH pin down to recharge the BOOT capacitor. The high-side MOSFET of the regulator stops switching because the voltage across the BOOT capacitor is less than 2.1 V. The output capacitor then decays until the difference in the input voltage and output voltage is greater than 2.1 V, at which point the BOOT UVLO threshold is exceeded, and the device starts switching again until the desired output voltage is reached. This operating condition persists until the input voltage and/or the load current increases. It is recommended to adjust the VIN stop voltage greater than the BOOT UVLO trigger condition at the minimum load of the application using the adjustable VIN UVLO feature with resistors on the EN pin.

{:soso_e124:}

qiangqssong · 发表于 2013-5-8 09:23

laobei1986 发表于 2013-5-7 19:04
* y. }% a% J: ]8 K" {7 J+ D9 O8 I+ I是的，加上输出电容后电路震荡，输出电压在11.5V到9V之间震荡。请问这是什么原因

这种情况估计得看震荡频率了,你可以先在电压输出端(VOUT端)并除47UF的大电容外,再并联1UF和0.1UF两种值的电容试试,也就是在输出端同时并联三种电容值的滤波电容(电容的值也可以参照电源芯片SPEC上的推荐的电容值),这样看能不能消除震荡??

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一个12V转11V的降压模块输出不稳定总在9~11V之间变化是什么原因

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